1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --no_x86_scrub_mem_shuffle 2; RUN: llc -mcpu=generic -mtriple=i686-pc-windows-msvc -mattr=+sse2 < %s | FileCheck %s --check-prefix=MSVC 3; RUN: llc -mcpu=generic -mtriple=i686-pc-mingw32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=MINGW 4 5@a = external dso_local global <4 x float>, align 16 6 7define dso_local void @testPastArguments() nounwind { 8; MSVC-LABEL: testPastArguments: 9; MSVC: # %bb.0: # %entry 10; MSVC-NEXT: subl $20, %esp 11; MSVC-NEXT: movaps _a, %xmm0 12; MSVC-NEXT: movups %xmm0, 4(%esp) 13; MSVC-NEXT: movl $1, (%esp) 14; MSVC-NEXT: calll _testm128 15; MSVC-NEXT: addl $20, %esp 16; MSVC-NEXT: retl 17; 18; MINGW-LABEL: testPastArguments: 19; MINGW: # %bb.0: # %entry 20; MINGW-NEXT: pushl %ebp 21; MINGW-NEXT: movl %esp, %ebp 22; MINGW-NEXT: andl $-16, %esp 23; MINGW-NEXT: subl $48, %esp 24; MINGW-NEXT: movaps _a, %xmm0 25; MINGW-NEXT: movaps %xmm0, 16(%esp) 26; MINGW-NEXT: movl $1, (%esp) 27; MINGW-NEXT: calll _testm128 28; MINGW-NEXT: movl %ebp, %esp 29; MINGW-NEXT: popl %ebp 30; MINGW-NEXT: retl 31entry: 32 %0 = load <4 x float>, ptr @a, align 16 33 %call = tail call i32 (i32, ...) @testm128(i32 1, <4 x float> inreg %0) 34 ret void 35} 36 37define <4 x i32> @foo(<4 x float> inreg %0, ...) nounwind { 38; MSVC-LABEL: foo: 39; MSVC: # %bb.0: 40; MSVC-NEXT: pushl %eax 41; MSVC-NEXT: movups 8(%esp), %xmm0 42; MSVC-NEXT: movups 24(%esp), %xmm1 43; MSVC-NEXT: cmpltps %xmm1, %xmm0 44; MSVC-NEXT: popl %eax 45; MSVC-NEXT: retl 46; 47; MINGW-LABEL: foo: 48; MINGW: # %bb.0: 49; MINGW-NEXT: pushl %ebp 50; MINGW-NEXT: movl %esp, %ebp 51; MINGW-NEXT: andl $-16, %esp 52; MINGW-NEXT: subl $16, %esp 53; MINGW-NEXT: movaps 8(%ebp), %xmm0 54; MINGW-NEXT: movups 24(%ebp), %xmm1 55; MINGW-NEXT: cmpltps %xmm1, %xmm0 56; MINGW-NEXT: movl %ebp, %esp 57; MINGW-NEXT: popl %ebp 58; MINGW-NEXT: retl 59 %2 = alloca ptr, align 4 60 call void @llvm.lifetime.start.p0(i64 4, ptr %2) 61 call void @llvm.va_start(ptr %2) 62 %3 = load ptr, ptr %2, align 4 63 %4 = load <4 x float>, ptr %3, align 4 64 %5 = fcmp ogt <4 x float> %4, %0 65 %6 = sext <4 x i1> %5 to <4 x i32> 66 call void @llvm.lifetime.end.p0(i64 4, ptr %2) 67 ret <4 x i32> %6 68} 69 70define <4 x i32> @bar() nounwind { 71; MSVC-LABEL: bar: 72; MSVC: # %bb.0: 73; MSVC-NEXT: subl $32, %esp 74; MSVC-NEXT: movaps {{.*#+}} xmm0 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0] 75; MSVC-NEXT: movups %xmm0, 16(%esp) 76; MSVC-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] 77; MSVC-NEXT: movups %xmm0, (%esp) 78; MSVC-NEXT: calll _foo 79; MSVC-NEXT: addl $32, %esp 80; MSVC-NEXT: retl 81; 82; MINGW-LABEL: bar: 83; MINGW: # %bb.0: 84; MINGW-NEXT: pushl %ebp 85; MINGW-NEXT: movl %esp, %ebp 86; MINGW-NEXT: andl $-16, %esp 87; MINGW-NEXT: subl $48, %esp 88; MINGW-NEXT: movaps {{.*#+}} xmm0 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0] 89; MINGW-NEXT: movaps %xmm0, 16(%esp) 90; MINGW-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] 91; MINGW-NEXT: movaps %xmm0, (%esp) 92; MINGW-NEXT: calll _foo 93; MINGW-NEXT: movl %ebp, %esp 94; MINGW-NEXT: popl %ebp 95; MINGW-NEXT: retl 96 %1 = tail call <4 x i32> (<4 x float>, ...) @foo(<4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00>, <4 x float> <float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00>) 97 ret <4 x i32> %1 98} 99 100declare i32 @testm128(i32, ...) nounwind 101declare void @llvm.va_start(ptr) 102declare void @llvm.lifetime.start.p0(i64, ptr) 103declare void @llvm.lifetime.end.p0(i64, ptr) 104