xref: /llvm-project/llvm/test/CodeGen/X86/urem-seteq-vec-nonzero.ll (revision 80a328b0118faa691137d6325b0eed4199060adc)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s --check-prefix=CHECK-SSE2
3; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.1 < %s | FileCheck %s --check-prefix=CHECK-SSE41
4; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx < %s | FileCheck %s --check-prefix=CHECK-AVX1
5; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s --check-prefix=CHECK-AVX2
6; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl < %s | FileCheck %s --check-prefix=CHECK-AVX512VL
7
8define <4 x i1> @t32_3(<4 x i32> %X) nounwind {
9; CHECK-SSE2-LABEL: t32_3:
10; CHECK-SSE2:       # %bb.0:
11; CHECK-SSE2-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
12; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
13; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
14; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm0
15; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[0,2,2,3]
16; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
17; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
18; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
19; CHECK-SSE2-NEXT:    pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
20; CHECK-SSE2-NEXT:    pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
21; CHECK-SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
22; CHECK-SSE2-NEXT:    pxor %xmm3, %xmm0
23; CHECK-SSE2-NEXT:    retq
24;
25; CHECK-SSE41-LABEL: t32_3:
26; CHECK-SSE41:       # %bb.0:
27; CHECK-SSE41-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
28; CHECK-SSE41-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
29; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [1431655765,1431655764,1431655764,1431655764]
30; CHECK-SSE41-NEXT:    pminud %xmm0, %xmm1
31; CHECK-SSE41-NEXT:    pcmpeqd %xmm1, %xmm0
32; CHECK-SSE41-NEXT:    retq
33;
34; CHECK-AVX1-LABEL: t32_3:
35; CHECK-AVX1:       # %bb.0:
36; CHECK-AVX1-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
37; CHECK-AVX1-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
38; CHECK-AVX1-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
39; CHECK-AVX1-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
40; CHECK-AVX1-NEXT:    retq
41;
42; CHECK-AVX2-LABEL: t32_3:
43; CHECK-AVX2:       # %bb.0:
44; CHECK-AVX2-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
45; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
46; CHECK-AVX2-NEXT:    vpmulld %xmm1, %xmm0, %xmm0
47; CHECK-AVX2-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
48; CHECK-AVX2-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
49; CHECK-AVX2-NEXT:    retq
50;
51; CHECK-AVX512VL-LABEL: t32_3:
52; CHECK-AVX512VL:       # %bb.0:
53; CHECK-AVX512VL-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
54; CHECK-AVX512VL-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
55; CHECK-AVX512VL-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
56; CHECK-AVX512VL-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
57; CHECK-AVX512VL-NEXT:    retq
58  %urem = urem <4 x i32> %X, <i32 3, i32 3, i32 3, i32 3>
59  %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 1, i32 2, i32 2>
60  ret <4 x i1> %cmp
61}
62
63define <4 x i1> @t32_5(<4 x i32> %X) nounwind {
64; CHECK-SSE2-LABEL: t32_5:
65; CHECK-SSE2:       # %bb.0:
66; CHECK-SSE2-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
67; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
68; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
69; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm0
70; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[0,2,2,3]
71; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
72; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
73; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
74; CHECK-SSE2-NEXT:    pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
75; CHECK-SSE2-NEXT:    pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
76; CHECK-SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
77; CHECK-SSE2-NEXT:    pxor %xmm3, %xmm0
78; CHECK-SSE2-NEXT:    retq
79;
80; CHECK-SSE41-LABEL: t32_5:
81; CHECK-SSE41:       # %bb.0:
82; CHECK-SSE41-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
83; CHECK-SSE41-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
84; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [858993458,858993458,858993458,858993458]
85; CHECK-SSE41-NEXT:    pminud %xmm0, %xmm1
86; CHECK-SSE41-NEXT:    pcmpeqd %xmm1, %xmm0
87; CHECK-SSE41-NEXT:    retq
88;
89; CHECK-AVX1-LABEL: t32_5:
90; CHECK-AVX1:       # %bb.0:
91; CHECK-AVX1-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
92; CHECK-AVX1-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
93; CHECK-AVX1-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
94; CHECK-AVX1-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
95; CHECK-AVX1-NEXT:    retq
96;
97; CHECK-AVX2-LABEL: t32_5:
98; CHECK-AVX2:       # %bb.0:
99; CHECK-AVX2-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
100; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
101; CHECK-AVX2-NEXT:    vpmulld %xmm1, %xmm0, %xmm0
102; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [858993458,858993458,858993458,858993458]
103; CHECK-AVX2-NEXT:    vpminud %xmm1, %xmm0, %xmm1
104; CHECK-AVX2-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
105; CHECK-AVX2-NEXT:    retq
106;
107; CHECK-AVX512VL-LABEL: t32_5:
108; CHECK-AVX512VL:       # %bb.0:
109; CHECK-AVX512VL-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
110; CHECK-AVX512VL-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
111; CHECK-AVX512VL-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm1
112; CHECK-AVX512VL-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
113; CHECK-AVX512VL-NEXT:    retq
114  %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 5, i32 5>
115  %cmp = icmp eq <4 x i32> %urem, <i32 1, i32 2, i32 3, i32 4>
116  ret <4 x i1> %cmp
117}
118
119define <4 x i1> @t32_6_part0(<4 x i32> %X) nounwind {
120; CHECK-SSE2-LABEL: t32_6_part0:
121; CHECK-SSE2:       # %bb.0:
122; CHECK-SSE2-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
123; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
124; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
125; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm0
126; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[0,2,2,3]
127; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
128; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
129; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
130; CHECK-SSE2-NEXT:    movdqa %xmm3, %xmm0
131; CHECK-SSE2-NEXT:    psrld $1, %xmm0
132; CHECK-SSE2-NEXT:    pslld $31, %xmm3
133; CHECK-SSE2-NEXT:    por %xmm0, %xmm3
134; CHECK-SSE2-NEXT:    pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
135; CHECK-SSE2-NEXT:    pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
136; CHECK-SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
137; CHECK-SSE2-NEXT:    pxor %xmm3, %xmm0
138; CHECK-SSE2-NEXT:    retq
139;
140; CHECK-SSE41-LABEL: t32_6_part0:
141; CHECK-SSE41:       # %bb.0:
142; CHECK-SSE41-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
143; CHECK-SSE41-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
144; CHECK-SSE41-NEXT:    movdqa %xmm0, %xmm1
145; CHECK-SSE41-NEXT:    psrld $1, %xmm1
146; CHECK-SSE41-NEXT:    pslld $31, %xmm0
147; CHECK-SSE41-NEXT:    por %xmm1, %xmm0
148; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [715827882,715827882,715827882,715827882]
149; CHECK-SSE41-NEXT:    pminud %xmm0, %xmm1
150; CHECK-SSE41-NEXT:    pcmpeqd %xmm1, %xmm0
151; CHECK-SSE41-NEXT:    retq
152;
153; CHECK-AVX1-LABEL: t32_6_part0:
154; CHECK-AVX1:       # %bb.0:
155; CHECK-AVX1-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
156; CHECK-AVX1-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
157; CHECK-AVX1-NEXT:    vpsrld $1, %xmm0, %xmm1
158; CHECK-AVX1-NEXT:    vpslld $31, %xmm0, %xmm0
159; CHECK-AVX1-NEXT:    vpor %xmm1, %xmm0, %xmm0
160; CHECK-AVX1-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
161; CHECK-AVX1-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
162; CHECK-AVX1-NEXT:    retq
163;
164; CHECK-AVX2-LABEL: t32_6_part0:
165; CHECK-AVX2:       # %bb.0:
166; CHECK-AVX2-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
167; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
168; CHECK-AVX2-NEXT:    vpmulld %xmm1, %xmm0, %xmm0
169; CHECK-AVX2-NEXT:    vpsrld $1, %xmm0, %xmm1
170; CHECK-AVX2-NEXT:    vpslld $31, %xmm0, %xmm0
171; CHECK-AVX2-NEXT:    vpor %xmm1, %xmm0, %xmm0
172; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [715827882,715827882,715827882,715827882]
173; CHECK-AVX2-NEXT:    vpminud %xmm1, %xmm0, %xmm1
174; CHECK-AVX2-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
175; CHECK-AVX2-NEXT:    retq
176;
177; CHECK-AVX512VL-LABEL: t32_6_part0:
178; CHECK-AVX512VL:       # %bb.0:
179; CHECK-AVX512VL-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
180; CHECK-AVX512VL-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
181; CHECK-AVX512VL-NEXT:    vprord $1, %xmm0, %xmm0
182; CHECK-AVX512VL-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm1
183; CHECK-AVX512VL-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
184; CHECK-AVX512VL-NEXT:    retq
185  %urem = urem <4 x i32> %X, <i32 6, i32 6, i32 6, i32 6>
186  %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 1, i32 2, i32 3>
187  ret <4 x i1> %cmp
188}
189
190define <4 x i1> @t32_6_part1(<4 x i32> %X) nounwind {
191; CHECK-SSE2-LABEL: t32_6_part1:
192; CHECK-SSE2:       # %bb.0:
193; CHECK-SSE2-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
194; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
195; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
196; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm0
197; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[0,2,2,3]
198; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
199; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
200; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
201; CHECK-SSE2-NEXT:    movdqa %xmm3, %xmm0
202; CHECK-SSE2-NEXT:    psrld $1, %xmm0
203; CHECK-SSE2-NEXT:    pslld $31, %xmm3
204; CHECK-SSE2-NEXT:    por %xmm0, %xmm3
205; CHECK-SSE2-NEXT:    pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
206; CHECK-SSE2-NEXT:    pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
207; CHECK-SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
208; CHECK-SSE2-NEXT:    pxor %xmm3, %xmm0
209; CHECK-SSE2-NEXT:    retq
210;
211; CHECK-SSE41-LABEL: t32_6_part1:
212; CHECK-SSE41:       # %bb.0:
213; CHECK-SSE41-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
214; CHECK-SSE41-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
215; CHECK-SSE41-NEXT:    movdqa %xmm0, %xmm1
216; CHECK-SSE41-NEXT:    psrld $1, %xmm1
217; CHECK-SSE41-NEXT:    pslld $31, %xmm0
218; CHECK-SSE41-NEXT:    por %xmm1, %xmm0
219; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [715827881,715827881,715827882,715827882]
220; CHECK-SSE41-NEXT:    pminud %xmm0, %xmm1
221; CHECK-SSE41-NEXT:    pcmpeqd %xmm1, %xmm0
222; CHECK-SSE41-NEXT:    retq
223;
224; CHECK-AVX1-LABEL: t32_6_part1:
225; CHECK-AVX1:       # %bb.0:
226; CHECK-AVX1-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
227; CHECK-AVX1-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
228; CHECK-AVX1-NEXT:    vpsrld $1, %xmm0, %xmm1
229; CHECK-AVX1-NEXT:    vpslld $31, %xmm0, %xmm0
230; CHECK-AVX1-NEXT:    vpor %xmm1, %xmm0, %xmm0
231; CHECK-AVX1-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
232; CHECK-AVX1-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
233; CHECK-AVX1-NEXT:    retq
234;
235; CHECK-AVX2-LABEL: t32_6_part1:
236; CHECK-AVX2:       # %bb.0:
237; CHECK-AVX2-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
238; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
239; CHECK-AVX2-NEXT:    vpmulld %xmm1, %xmm0, %xmm0
240; CHECK-AVX2-NEXT:    vpsrld $1, %xmm0, %xmm1
241; CHECK-AVX2-NEXT:    vpslld $31, %xmm0, %xmm0
242; CHECK-AVX2-NEXT:    vpor %xmm1, %xmm0, %xmm0
243; CHECK-AVX2-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
244; CHECK-AVX2-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
245; CHECK-AVX2-NEXT:    retq
246;
247; CHECK-AVX512VL-LABEL: t32_6_part1:
248; CHECK-AVX512VL:       # %bb.0:
249; CHECK-AVX512VL-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
250; CHECK-AVX512VL-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
251; CHECK-AVX512VL-NEXT:    vprord $1, %xmm0, %xmm0
252; CHECK-AVX512VL-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
253; CHECK-AVX512VL-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
254; CHECK-AVX512VL-NEXT:    retq
255  %urem = urem <4 x i32> %X, <i32 6, i32 6, i32 6, i32 6>
256  %cmp = icmp eq <4 x i32> %urem, <i32 4, i32 5, i32 0, i32 0>
257  ret <4 x i1> %cmp
258}
259
260define <4 x i1> @t32_tautological(<4 x i32> %X) nounwind {
261; CHECK-SSE2-LABEL: t32_tautological:
262; CHECK-SSE2:       # %bb.0:
263; CHECK-SSE2-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
264; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
265; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
266; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm0
267; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
268; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
269; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
270; CHECK-SSE2-NEXT:    pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
271; CHECK-SSE2-NEXT:    pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
272; CHECK-SSE2-NEXT:    pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
273; CHECK-SSE2-NEXT:    retq
274;
275; CHECK-SSE41-LABEL: t32_tautological:
276; CHECK-SSE41:       # %bb.0:
277; CHECK-SSE41-NEXT:    psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
278; CHECK-SSE41-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
279; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [4294967295,4294967295,4294967295,1431655764]
280; CHECK-SSE41-NEXT:    pminud %xmm0, %xmm1
281; CHECK-SSE41-NEXT:    pcmpeqd %xmm1, %xmm0
282; CHECK-SSE41-NEXT:    pxor %xmm1, %xmm1
283; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
284; CHECK-SSE41-NEXT:    retq
285;
286; CHECK-AVX1-LABEL: t32_tautological:
287; CHECK-AVX1:       # %bb.0:
288; CHECK-AVX1-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
289; CHECK-AVX1-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
290; CHECK-AVX1-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
291; CHECK-AVX1-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
292; CHECK-AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
293; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
294; CHECK-AVX1-NEXT:    retq
295;
296; CHECK-AVX2-LABEL: t32_tautological:
297; CHECK-AVX2:       # %bb.0:
298; CHECK-AVX2-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
299; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
300; CHECK-AVX2-NEXT:    vpmulld %xmm1, %xmm0, %xmm0
301; CHECK-AVX2-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
302; CHECK-AVX2-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
303; CHECK-AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1
304; CHECK-AVX2-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
305; CHECK-AVX2-NEXT:    retq
306;
307; CHECK-AVX512VL-LABEL: t32_tautological:
308; CHECK-AVX512VL:       # %bb.0:
309; CHECK-AVX512VL-NEXT:    vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
310; CHECK-AVX512VL-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
311; CHECK-AVX512VL-NEXT:    vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
312; CHECK-AVX512VL-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
313; CHECK-AVX512VL-NEXT:    vpxor %xmm1, %xmm1, %xmm1
314; CHECK-AVX512VL-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
315; CHECK-AVX512VL-NEXT:    retq
316  %urem = urem <4 x i32> %X, <i32 1, i32 1, i32 2, i32 3>
317  %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 1, i32 2, i32 2>
318  ret <4 x i1> %cmp
319}
320