xref: /llvm-project/llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll (revision f6d1d6fe7b7f04db7f0a445c8bc3e63fcdcd8e0a)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
3
4define i32 @foo(i32 %arg1) #0 {
5; CHECK-LABEL: foo:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
8; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
9; CHECK-NEXT:    vmovups %ymm0, -{{[0-9]+}}(%rsp)
10; CHECK-NEXT:    andl $31, %edi
11; CHECK-NEXT:    movzbl -40(%rsp,%rdi), %eax
12; CHECK-NEXT:    vzeroupper
13; CHECK-NEXT:    retq
14entry:
15  %a = extractelement <32 x i8> zeroinitializer, i32 %arg1
16  %b = zext i8 %a to i32
17  ret i32 %b
18}
19
20define i32 @foo2(i32 %arg1) #1 {
21; CHECK-LABEL: foo2:
22; CHECK:       # %bb.0: # %entry
23; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
24; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
25; CHECK-NEXT:    vmovups %ymm0, -{{[0-9]+}}(%rsp)
26; CHECK-NEXT:    vmovups %ymm0, -{{[0-9]+}}(%rsp)
27; CHECK-NEXT:    andl $31, %edi
28; CHECK-NEXT:    movzwl -72(%rsp,%rdi,2), %eax
29; CHECK-NEXT:    vzeroupper
30; CHECK-NEXT:    retq
31entry:
32  %a = extractelement <32 x i16> zeroinitializer, i32 %arg1
33  %b = zext i16 %a to i32
34  ret i32 %b
35}
36
37attributes #0 = { "no-realign-stack" "target-cpu"="skylake-avx512" }
38attributes #1 = { "no-realign-stack" "target-cpu"="skylake" }
39