1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i386-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X86 3; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X64 4; rdar://6034396 5 6define void @test(i32 %x, ptr %y) nounwind { 7; X86-LABEL: test: 8; X86: ## %bb.0: ## %entry 9; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 10; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 11; X86-NEXT: shrl $23, %ecx 12; X86-NEXT: cvtsi2ss %ecx, %xmm0 13; X86-NEXT: movss %xmm0, (%eax) 14; X86-NEXT: retl 15; 16; X64-LABEL: test: 17; X64: ## %bb.0: ## %entry 18; X64-NEXT: shrl $23, %edi 19; X64-NEXT: cvtsi2ss %edi, %xmm0 20; X64-NEXT: movss %xmm0, (%rsi) 21; X64-NEXT: retq 22entry: 23 lshr i32 %x, 23 24 uitofp i32 %0 to float 25 store float %1, ptr %y 26 ret void 27} 28 29define float @test_without_nneg(i32 %x) nounwind { 30; X86-LABEL: test_without_nneg: 31; X86: ## %bb.0: 32; X86-NEXT: pushl %eax 33; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 34; X86-NEXT: orpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 35; X86-NEXT: subsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 36; X86-NEXT: cvtsd2ss %xmm0, %xmm0 37; X86-NEXT: movss %xmm0, (%esp) 38; X86-NEXT: flds (%esp) 39; X86-NEXT: popl %eax 40; X86-NEXT: retl 41; 42; X64-LABEL: test_without_nneg: 43; X64: ## %bb.0: 44; X64-NEXT: movl %edi, %eax 45; X64-NEXT: cvtsi2ss %rax, %xmm0 46; X64-NEXT: retq 47 %r = uitofp i32 %x to float 48 ret float %r 49} 50 51define float @test_with_nneg(i32 %x) nounwind { 52; X86-LABEL: test_with_nneg: 53; X86: ## %bb.0: 54; X86-NEXT: pushl %eax 55; X86-NEXT: cvtsi2ssl {{[0-9]+}}(%esp), %xmm0 56; X86-NEXT: movss %xmm0, (%esp) 57; X86-NEXT: flds (%esp) 58; X86-NEXT: popl %eax 59; X86-NEXT: retl 60; 61; X64-LABEL: test_with_nneg: 62; X64: ## %bb.0: 63; X64-NEXT: cvtsi2ss %edi, %xmm0 64; X64-NEXT: retq 65 %r = uitofp nneg i32 %x to float 66 ret float %r 67} 68 69define <4 x float> @test_with_nneg_vec(<4 x i32> %x) nounwind { 70; X86-LABEL: test_with_nneg_vec: 71; X86: ## %bb.0: 72; X86-NEXT: cvtdq2ps %xmm0, %xmm0 73; X86-NEXT: retl 74; 75; X64-LABEL: test_with_nneg_vec: 76; X64: ## %bb.0: 77; X64-NEXT: cvtdq2ps %xmm0, %xmm0 78; X64-NEXT: retq 79 %r = uitofp nneg <4 x i32> %x to <4 x float> 80 ret <4 x float> %r 81} 82