xref: /llvm-project/llvm/test/CodeGen/X86/tailcc-fastcc.ll (revision 0aef747b846586c29ed3285bbed20a3d607576fa)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -tailcallopt < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
3; RUN: llc -tailcallopt < %s -mtriple=i686-unknown-unknown   | FileCheck %s -check-prefix=X32
4
5; llc -tailcallopt should not enable tail calls from fastcc to tailcc or vice versa
6
7declare tailcc i32 @tailcallee1(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
8
9define fastcc i32 @tailcaller1(i32 %in1, i32 %in2) nounwind {
10; X64-LABEL: tailcaller1:
11; X64:       # %bb.0: # %entry
12; X64-NEXT:    pushq %rax
13; X64-NEXT:    movl %edi, %edx
14; X64-NEXT:    movl %esi, %ecx
15; X64-NEXT:    callq tailcallee1@PLT
16; X64-NEXT:    retq $8
17;
18; X32-LABEL: tailcaller1:
19; X32:       # %bb.0: # %entry
20; X32-NEXT:    pushl %edx
21; X32-NEXT:    pushl %ecx
22; X32-NEXT:    calll tailcallee1@PLT
23; X32-NEXT:    retl
24entry:
25  %tmp11 = tail call tailcc i32 @tailcallee1(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
26  ret i32 %tmp11
27}
28
29declare fastcc i32 @tailcallee2(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
30
31define tailcc i32 @tailcaller2(i32 %in1, i32 %in2) nounwind {
32; X64-LABEL: tailcaller2:
33; X64:       # %bb.0: # %entry
34; X64-NEXT:    pushq %rax
35; X64-NEXT:    movl %edi, %edx
36; X64-NEXT:    movl %esi, %ecx
37; X64-NEXT:    callq tailcallee2@PLT
38; X64-NEXT:    retq $8
39;
40; X32-LABEL: tailcaller2:
41; X32:       # %bb.0: # %entry
42; X32-NEXT:    pushl %edx
43; X32-NEXT:    pushl %ecx
44; X32-NEXT:    calll tailcallee2@PLT
45; X32-NEXT:    retl
46entry:
47  %tmp11 = tail call fastcc i32 @tailcallee2(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
48  ret i32 %tmp11
49}
50