xref: /llvm-project/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll (revision 112fba974ce42a6e552f7391d20a858a128283a1)
1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -mtriple=x86_64-linux -stop-after=early-tailduplication \
3; RUN:  -verify-machineinstrs < %s | FileCheck %s
4
5; Ensure that we don't duplicate a block with an "INLINEASM_BR" instruction
6; during code gen.
7declare dso_local void @foo()
8
9define ptr @test1(ptr %arg1, ptr %arg2) {
10  ; CHECK-LABEL: name: test1
11  ; CHECK: bb.0.bb:
12  ; CHECK-NEXT:   successors: %bb.1(0x50000000), %bb.2(0x30000000)
13  ; CHECK-NEXT:   liveins: $rdi, $rsi
14  ; CHECK-NEXT: {{  $}}
15  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr64 = COPY $rsi
16  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
17  ; CHECK-NEXT:   [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s64) from %ir.arg1)
18  ; CHECK-NEXT:   [[SUB64rr:%[0-9]+]]:gr64 = SUB64rr [[MOV64rm]], [[COPY]], implicit-def $eflags
19  ; CHECK-NEXT:   JCC_1 %bb.2, 4, implicit $eflags
20  ; CHECK-NEXT:   JMP_1 %bb.1
21  ; CHECK-NEXT: {{  $}}
22  ; CHECK-NEXT: bb.1.bb100:
23  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
24  ; CHECK-NEXT: {{  $}}
25  ; CHECK-NEXT:   MOV64mi32 [[COPY1]], 1, $noreg, 0, $noreg, 0 :: (store (s64) into %ir.arg1)
26  ; CHECK-NEXT:   JMP_1 %bb.3
27  ; CHECK-NEXT: {{  $}}
28  ; CHECK-NEXT: bb.2.bb106:
29  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
30  ; CHECK-NEXT: {{  $}}
31  ; CHECK-NEXT:   ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
32  ; CHECK-NEXT:   CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp
33  ; CHECK-NEXT:   ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
34  ; CHECK-NEXT: {{  $}}
35  ; CHECK-NEXT: bb.3.bb110:
36  ; CHECK-NEXT:   successors: %bb.5(0x80000000), %bb.4(0x00000000)
37  ; CHECK-NEXT: {{  $}}
38  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:gr64 = PHI [[COPY]], %bb.2, [[MOV64rm]], %bb.1
39  ; CHECK-NEXT:   INLINEASM_BR &"#$0 $1 $2", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 42, 13 /* imm */, 0, 13 /* imm */, %bb.4, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags
40  ; CHECK-NEXT:   JMP_1 %bb.5
41  ; CHECK-NEXT: {{  $}}
42  ; CHECK-NEXT: bb.4.bb17.i.i.i (machine-block-address-taken, inlineasm-br-indirect-target):
43  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
44  ; CHECK-NEXT: {{  $}}
45  ; CHECK-NEXT: bb.5.kmem_cache_has_cpu_partial.exit:
46  ; CHECK-NEXT:   $rax = COPY [[PHI]]
47  ; CHECK-NEXT:   RET 0, $rax
48bb:
49  %i28.i = load ptr, ptr %arg1, align 8
50  %if = icmp ne ptr %i28.i, %arg2
51  br i1 %if, label %bb100, label %bb106
52
53bb100:                                            ; preds = %bb
54  store ptr null, ptr %arg1, align 8
55  br label %bb110
56
57bb106:                                            ; preds = %bb
58  call void @foo()
59  br label %bb110
60
61bb110:                                            ; preds = %bb106, %bb100
62  %i10.1 = phi ptr [ %arg2, %bb106 ], [ %i28.i, %bb100 ]
63  callbr void asm sideeffect "#$0 $1 $2", "i,i,!i,~{dirflag},~{fpsr},~{flags}"(i32 42, i1 false)
64          to label %kmem_cache_has_cpu_partial.exit [label %bb17.i.i.i]
65
66bb17.i.i.i:                                       ; preds = %bb110
67  br label %kmem_cache_has_cpu_partial.exit
68
69kmem_cache_has_cpu_partial.exit:                  ; preds = %bb110
70  ret ptr %i10.1
71}
72
73; The intent of this test is to test what happens when we have a callbr where
74; BOTH the fallthrough/direct target and the indirect target are the same basic
75; block. We might one day permit tail duplication here, but we need to ensure
76; that we don't crash or run afoul of any MachineVerifier checks.
77define void @ceph_con_v2_try_read(i32 %__trans_tmp_3.sroa.0.0.copyload, i1 %tobool.not.i.i) nounwind {
78  ; CHECK-LABEL: name: ceph_con_v2_try_read
79  ; CHECK: bb.0.entry:
80  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
81  ; CHECK-NEXT:   liveins: $edi, $esi
82  ; CHECK-NEXT: {{  $}}
83  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY $esi
84  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY $edi
85  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
86  ; CHECK-NEXT: {{  $}}
87  ; CHECK-NEXT: bb.1.for.cond:
88  ; CHECK-NEXT:   successors: %bb.2(0x30000000), %bb.1(0x50000000)
89  ; CHECK-NEXT: {{  $}}
90  ; CHECK-NEXT:   TEST32rr [[COPY1]], [[COPY1]], implicit-def $eflags
91  ; CHECK-NEXT:   JCC_1 %bb.1, 5, implicit $eflags
92  ; CHECK-NEXT:   JMP_1 %bb.2
93  ; CHECK-NEXT: {{  $}}
94  ; CHECK-NEXT: bb.2.sw.bb:
95  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
96  ; CHECK-NEXT: {{  $}}
97  ; CHECK-NEXT:   ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
98  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
99  ; CHECK-NEXT:   [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, killed [[MOV32r0_]], %subreg.sub_32bit
100  ; CHECK-NEXT:   [[LEA64r:%[0-9]+]]:gr64 = LEA64r %stack.0.skip.i.i, 1, $noreg, 0, $noreg
101  ; CHECK-NEXT:   $rdi = COPY [[LEA64r]]
102  ; CHECK-NEXT:   CALL64r killed [[SUBREG_TO_REG]], csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
103  ; CHECK-NEXT:   ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
104  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gr32 = COPY $eax
105  ; CHECK-NEXT:   TEST8ri [[COPY2]], 1, implicit-def $eflags
106  ; CHECK-NEXT:   JCC_1 %bb.4, 4, implicit $eflags
107  ; CHECK-NEXT:   JMP_1 %bb.3
108  ; CHECK-NEXT: {{  $}}
109  ; CHECK-NEXT: bb.3.if.else.i.i:
110  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
111  ; CHECK-NEXT: {{  $}}
112  ; CHECK-NEXT:   INLINEASM_BR &"", 1 /* sideeffect attdialect */, 13 /* imm */, %bb.5
113  ; CHECK-NEXT:   JMP_1 %bb.5
114  ; CHECK-NEXT: {{  $}}
115  ; CHECK-NEXT: bb.4.process_message_header.exit.i:
116  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
117  ; CHECK-NEXT: {{  $}}
118  ; CHECK-NEXT:   LIFETIME_END %stack.0.skip.i.i
119  ; CHECK-NEXT:   JMP_1 %bb.1
120  ; CHECK-NEXT: {{  $}}
121  ; CHECK-NEXT: bb.5.if.end.i (machine-block-address-taken, inlineasm-br-indirect-target):
122  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
123  ; CHECK-NEXT: {{  $}}
124  ; CHECK-NEXT:   LIFETIME_END %stack.0.skip.i.i
125  ; CHECK-NEXT:   JMP_1 %bb.1
126entry:
127  %skip.i.i = alloca i32, i32 0, align 4
128  %cond = icmp eq i32 %__trans_tmp_3.sroa.0.0.copyload, 0
129  br label %for.cond
130
131for.cond:
132  br i1 %cond, label %sw.bb, label %for.cond
133
134sw.bb:
135  %call.i.i2 = call i32 null(ptr %skip.i.i)
136  br i1 %tobool.not.i.i, label %if.else.i.i, label %process_message_header.exit.i
137
138if.else.i.i:
139  callbr void asm sideeffect "", "!i"()
140          to label %if.end.i [label %if.end.i]
141
142process_message_header.exit.i:
143  call void @llvm.lifetime.end.p0(i64 0, ptr %skip.i.i)
144  br label %for.cond
145
146if.end.i:
147  call void @llvm.lifetime.end.p0(i64 0, ptr %skip.i.i)
148  br label %for.cond
149}
150
151declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
152