xref: /llvm-project/llvm/test/CodeGen/X86/switch-phi-const.ll (revision b8817825b9dcb45f204d3a3a9056f929e12c7a3b)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc %s -o - -mtriple=x86_64-- | FileCheck %s
3@g = global i32 0
4@effect = global i32 0
5
6define void @switch_phi_const(i32 %x) {
7; CHECK-LABEL: switch_phi_const:
8; CHECK:       # %bb.0: # %bb0
9; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
10; CHECK-NEXT:    leal -1(%rdi), %eax
11; CHECK-NEXT:    cmpl $54, %eax
12; CHECK-NEXT:    ja .LBB0_9
13; CHECK-NEXT:  # %bb.1: # %bb0
14; CHECK-NEXT:    jmpq *.LJTI0_0(,%rax,8)
15; CHECK-NEXT:  .LBB0_3: # %case_7
16; CHECK-NEXT:    movq g@GOTPCREL(%rip), %rax
17; CHECK-NEXT:    movl (%rax), %edi
18; CHECK-NEXT:    movq effect@GOTPCREL(%rip), %rax
19; CHECK-NEXT:    movl $7, (%rax)
20; CHECK-NEXT:  .LBB0_4: # %case_1_loop
21; CHECK-NEXT:    movq effect@GOTPCREL(%rip), %rax
22; CHECK-NEXT:    movl $1, (%rax)
23; CHECK-NEXT:  .LBB0_5: # %case_5
24; CHECK-NEXT:    movq effect@GOTPCREL(%rip), %rax
25; CHECK-NEXT:    movl $5, (%rax)
26; CHECK-NEXT:  .LBB0_6: # %case_13
27; CHECK-NEXT:    movq effect@GOTPCREL(%rip), %rax
28; CHECK-NEXT:    movl $13, (%rax)
29; CHECK-NEXT:  .LBB0_7: # %case_42
30; CHECK-NEXT:    movq effect@GOTPCREL(%rip), %rax
31; CHECK-NEXT:    movl %edi, (%rax)
32; CHECK-NEXT:    movl $55, %eax
33; CHECK-NEXT:  .LBB0_8: # %case_55
34; CHECK-NEXT:    movq effect@GOTPCREL(%rip), %rcx
35; CHECK-NEXT:    movl %eax, (%rcx)
36; CHECK-NEXT:  .LBB0_9: # %default
37; CHECK-NEXT:    retq
38; CHECK-NEXT:  .LBB0_2:
39; CHECK-NEXT:    movl $42, %eax
40; CHECK-NEXT:    jmp .LBB0_8
41bb0:
42  switch i32 %x, label %default [
43  i32 1, label %case_1_loop
44  i32 5, label %case_5
45  i32 7, label %case_7
46  i32 13, label %case_13
47  i32 42, label %case_42
48  i32 55, label %case_55
49  ]
50
51case_1_loop:
52  ; We should replace 1 with %x
53  %x0 = phi i32 [ 1, %bb0 ], [ %x5, %case_7 ]
54  store i32 1, ptr @effect, align 4
55  br label %case_5
56
57case_5:
58  ; We should replace 5 with %x
59  %x1 = phi i32 [ 5, %bb0 ], [ %x0, %case_1_loop ]
60  store i32 5, ptr @effect, align 4
61  br label %case_13
62
63case_13:
64  ; We should replace 13 with %x
65  %x2 = phi i32 [ 13, %bb0 ], [ %x1, %case_5 ]
66  store i32 13, ptr @effect, align 4
67  br label %case_42
68
69case_42:
70  ; We should replace 42 with %x
71  %x3 = phi i32 [ 42, %bb0 ], [ %x2, %case_13 ]
72  store i32 %x3, ptr @effect, align 4
73  br label %case_55
74
75case_55:
76  ; We must not replace any of the PHI arguments!
77  %x4 = phi i32 [ 42, %bb0 ], [ 55, %case_42 ]
78  store i32 %x4, ptr @effect, align 4
79  br label %default
80
81case_7:
82  %x5 = load i32, ptr @g, align 4
83  store i32 7, ptr @effect, align 4
84  br label %case_1_loop
85
86default:
87  ret void
88}
89
90@g64 = global i64 0
91@effect64 = global i64 0
92
93define void @switch_trunc_phi_const(i32 %x) {
94; CHECK-LABEL: switch_trunc_phi_const:
95; CHECK:       # %bb.0: # %bb0
96; CHECK-NEXT:    movzbl %dil, %eax
97; CHECK-NEXT:    leal -1(%rax), %ecx
98; CHECK-NEXT:    cmpl $54, %ecx
99; CHECK-NEXT:    ja .LBB1_9
100; CHECK-NEXT:  # %bb.1: # %bb0
101; CHECK-NEXT:    jmpq *.LJTI1_0(,%rcx,8)
102; CHECK-NEXT:  .LBB1_2:
103; CHECK-NEXT:    movl $3895, %eax # imm = 0xF37
104; CHECK-NEXT:    jmp .LBB1_7
105; CHECK-NEXT:  .LBB1_9: # %default
106; CHECK-NEXT:    retq
107; CHECK-NEXT:  .LBB1_3: # %case_1_loop
108; CHECK-NEXT:    movq effect64@GOTPCREL(%rip), %rcx
109; CHECK-NEXT:    movq $1, (%rcx)
110; CHECK-NEXT:  .LBB1_4: # %case_5
111; CHECK-NEXT:    movq effect64@GOTPCREL(%rip), %rcx
112; CHECK-NEXT:    movq $5, (%rcx)
113; CHECK-NEXT:  .LBB1_5: # %case_13
114; CHECK-NEXT:    movq effect64@GOTPCREL(%rip), %rcx
115; CHECK-NEXT:    movq $13, (%rcx)
116; CHECK-NEXT:  .LBB1_6: # %case_42
117; CHECK-NEXT:    movq effect64@GOTPCREL(%rip), %rcx
118; CHECK-NEXT:    movq %rax, (%rcx)
119; CHECK-NEXT:    movl $55, %eax
120; CHECK-NEXT:  .LBB1_7: # %case_55
121; CHECK-NEXT:    movq effect64@GOTPCREL(%rip), %rcx
122; CHECK-NEXT:    movq %rax, (%rcx)
123; CHECK-NEXT:  .LBB1_8: # %case_7
124; CHECK-NEXT:    movq g64@GOTPCREL(%rip), %rax
125; CHECK-NEXT:    movq (%rax), %rax
126; CHECK-NEXT:    movq effect64@GOTPCREL(%rip), %rcx
127; CHECK-NEXT:    movq $7, (%rcx)
128; CHECK-NEXT:    jmp .LBB1_3
129bb0:
130  %x_trunc = trunc i32 %x to i8
131  switch i8 %x_trunc, label %default [
132  i8 1, label %case_1_loop
133  i8 5, label %case_5
134  i8 7, label %case_7
135  i8 13, label %case_13
136  i8 42, label %case_42
137  i8 55, label %case_55
138  ]
139
140case_1_loop:
141  ; We should replace 1 with %x
142  %x0 = phi i64 [ 1, %bb0 ], [ %x5, %case_7 ]
143  store i64 1, ptr @effect64, align 4
144  br label %case_5
145
146case_5:
147  ; We should replace 5 with %x
148  %x1 = phi i64 [ 5, %bb0 ], [ %x0, %case_1_loop ]
149  store i64 5, ptr @effect64, align 4
150  br label %case_13
151
152case_13:
153  ; We should replace 13 with %x
154  %x2 = phi i64 [ 13, %bb0 ], [ %x1, %case_5 ]
155  store i64 13, ptr @effect64, align 4
156  br label %case_42
157
158case_42:
159  ; We should replace 42 with %x
160  %x3 = phi i64 [ 42, %bb0 ], [ %x2, %case_13 ]
161  store i64 %x3, ptr @effect64, align 4
162  br label %case_55
163
164case_55:
165  ; We must not replace any of the PHI arguments! (3898 == 0xf00 + 55)
166  %x4 = phi i64 [ 3895, %bb0 ], [ 55, %case_42 ]
167  store i64 %x4, ptr @effect64, align 4
168  br label %case_7
169
170case_7:
171  %x5 = load i64, ptr @g64, align 4
172  store i64 7, ptr @effect64, align 4
173  br label %case_1_loop
174
175default:
176  ret void
177}
178