xref: /llvm-project/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi %s -o - | FileCheck %s
3; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-one-lfence-per-bb %s -o - | FileCheck %s --check-prefix=X86-ONE-LFENCE
4; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-omit-branch-lfences %s -o - | FileCheck %s --check-prefix=X86-OMIT-BR
5; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-only-lfence-non-const %s -o - | FileCheck %s --check-prefix=X86-NON-CONST
6
7define dso_local void @_Z4buzzv() {
8; CHECK-LABEL: _Z4buzzv:
9; CHECK:       # %bb.0: # %entry
10; CHECK-NEXT:    lfence
11; CHECK-NEXT:    movl $10, -{{[0-9]+}}(%rsp)
12; CHECK-NEXT:    retq
13;
14; X86-ONE-LFENCE-LABEL: _Z4buzzv:
15; X86-ONE-LFENCE:       # %bb.0: # %entry
16; X86-ONE-LFENCE-NEXT:    lfence
17; X86-ONE-LFENCE-NEXT:    movl $10, -{{[0-9]+}}(%rsp)
18; X86-ONE-LFENCE-NEXT:    retq
19;
20; X86-OMIT-BR-LABEL: _Z4buzzv:
21; X86-OMIT-BR:       # %bb.0: # %entry
22; X86-OMIT-BR-NEXT:    lfence
23; X86-OMIT-BR-NEXT:    movl $10, -{{[0-9]+}}(%rsp)
24; X86-OMIT-BR-NEXT:    retq
25;
26; X86-NON-CONST-LABEL: _Z4buzzv:
27; X86-NON-CONST:       # %bb.0: # %entry
28; X86-NON-CONST-NEXT:    lfence
29; X86-NON-CONST-NEXT:    movl $10, -{{[0-9]+}}(%rsp)
30; X86-NON-CONST-NEXT:    retq
31entry:
32  %a = alloca i32, align 4
33  store i32 10, ptr %a, align 4
34  ret void
35}
36
37define dso_local i32 @_Z3barPi(ptr %p) {
38; CHECK-LABEL: _Z3barPi:
39; CHECK:       # %bb.0: # %entry
40; CHECK-NEXT:    lfence
41; CHECK-NEXT:    movq %rdi, -{{[0-9]+}}(%rsp)
42; CHECK-NEXT:    lfence
43; CHECK-NEXT:    movl $4, -{{[0-9]+}}(%rsp)
44; CHECK-NEXT:    lfence
45; CHECK-NEXT:    cmpl $3, (%rdi)
46; CHECK-NEXT:    lfence
47; CHECK-NEXT:    jg .LBB1_2
48; CHECK-NEXT:  # %bb.1: # %if.then
49; CHECK-NEXT:    lfence
50; CHECK-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
51; CHECK-NEXT:    lfence
52; CHECK-NEXT:    movslq (%rax), %rax
53; CHECK-NEXT:    lfence
54; CHECK-NEXT:    movl -24(%rsp,%rax,4), %eax
55; CHECK-NEXT:    lfence
56; CHECK-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
57; CHECK-NEXT:    lfence
58; CHECK-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
59; CHECK-NEXT:    retq
60; CHECK-NEXT:  .LBB1_2: # %if.else
61; CHECK-NEXT:    lfence
62; CHECK-NEXT:    movl $-1, -{{[0-9]+}}(%rsp)
63; CHECK-NEXT:    lfence
64; CHECK-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
65; CHECK-NEXT:    retq
66;
67; X86-ONE-LFENCE-LABEL: _Z3barPi:
68; X86-ONE-LFENCE:       # %bb.0: # %entry
69; X86-ONE-LFENCE-NEXT:    lfence
70; X86-ONE-LFENCE-NEXT:    movq %rdi, -{{[0-9]+}}(%rsp)
71; X86-ONE-LFENCE-NEXT:    movl $4, -{{[0-9]+}}(%rsp)
72; X86-ONE-LFENCE-NEXT:    cmpl $3, (%rdi)
73; X86-ONE-LFENCE-NEXT:    jg .LBB1_2
74; X86-ONE-LFENCE-NEXT:  # %bb.1: # %if.then
75; X86-ONE-LFENCE-NEXT:    lfence
76; X86-ONE-LFENCE-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
77; X86-ONE-LFENCE-NEXT:    movslq (%rax), %rax
78; X86-ONE-LFENCE-NEXT:    movl -24(%rsp,%rax,4), %eax
79; X86-ONE-LFENCE-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
80; X86-ONE-LFENCE-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
81; X86-ONE-LFENCE-NEXT:    retq
82; X86-ONE-LFENCE-NEXT:  .LBB1_2: # %if.else
83; X86-ONE-LFENCE-NEXT:    lfence
84; X86-ONE-LFENCE-NEXT:    movl $-1, -{{[0-9]+}}(%rsp)
85; X86-ONE-LFENCE-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
86; X86-ONE-LFENCE-NEXT:    retq
87;
88; X86-OMIT-BR-LABEL: _Z3barPi:
89; X86-OMIT-BR:       # %bb.0: # %entry
90; X86-OMIT-BR-NEXT:    lfence
91; X86-OMIT-BR-NEXT:    movq %rdi, -{{[0-9]+}}(%rsp)
92; X86-OMIT-BR-NEXT:    lfence
93; X86-OMIT-BR-NEXT:    movl $4, -{{[0-9]+}}(%rsp)
94; X86-OMIT-BR-NEXT:    lfence
95; X86-OMIT-BR-NEXT:    cmpl $3, (%rdi)
96; X86-OMIT-BR-NEXT:    jg .LBB1_2
97; X86-OMIT-BR-NEXT:  # %bb.1: # %if.then
98; X86-OMIT-BR-NEXT:    lfence
99; X86-OMIT-BR-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
100; X86-OMIT-BR-NEXT:    lfence
101; X86-OMIT-BR-NEXT:    movslq (%rax), %rax
102; X86-OMIT-BR-NEXT:    lfence
103; X86-OMIT-BR-NEXT:    movl -24(%rsp,%rax,4), %eax
104; X86-OMIT-BR-NEXT:    lfence
105; X86-OMIT-BR-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
106; X86-OMIT-BR-NEXT:    lfence
107; X86-OMIT-BR-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
108; X86-OMIT-BR-NEXT:    retq
109; X86-OMIT-BR-NEXT:  .LBB1_2: # %if.else
110; X86-OMIT-BR-NEXT:    lfence
111; X86-OMIT-BR-NEXT:    movl $-1, -{{[0-9]+}}(%rsp)
112; X86-OMIT-BR-NEXT:    lfence
113; X86-OMIT-BR-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
114; X86-OMIT-BR-NEXT:    retq
115;
116; X86-NON-CONST-LABEL: _Z3barPi:
117; X86-NON-CONST:       # %bb.0: # %entry
118; X86-NON-CONST-NEXT:    lfence
119; X86-NON-CONST-NEXT:    movq %rdi, -{{[0-9]+}}(%rsp)
120; X86-NON-CONST-NEXT:    lfence
121; X86-NON-CONST-NEXT:    movl $4, -{{[0-9]+}}(%rsp)
122; X86-NON-CONST-NEXT:    lfence
123; X86-NON-CONST-NEXT:    cmpl $3, (%rdi)
124; X86-NON-CONST-NEXT:    lfence
125; X86-NON-CONST-NEXT:    jg .LBB1_2
126; X86-NON-CONST-NEXT:  # %bb.1: # %if.then
127; X86-NON-CONST-NEXT:    lfence
128; X86-NON-CONST-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
129; X86-NON-CONST-NEXT:    lfence
130; X86-NON-CONST-NEXT:    movslq (%rax), %rax
131; X86-NON-CONST-NEXT:    lfence
132; X86-NON-CONST-NEXT:    movl -24(%rsp,%rax,4), %eax
133; X86-NON-CONST-NEXT:    lfence
134; X86-NON-CONST-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
135; X86-NON-CONST-NEXT:    lfence
136; X86-NON-CONST-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
137; X86-NON-CONST-NEXT:    retq
138; X86-NON-CONST-NEXT:  .LBB1_2: # %if.else
139; X86-NON-CONST-NEXT:    lfence
140; X86-NON-CONST-NEXT:    movl $-1, -{{[0-9]+}}(%rsp)
141; X86-NON-CONST-NEXT:    lfence
142; X86-NON-CONST-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
143; X86-NON-CONST-NEXT:    retq
144entry:
145  %retval = alloca i32, align 4
146  %p.addr = alloca ptr, align 8
147  %a = alloca [4 x i32], align 16
148  %len = alloca i32, align 4
149  store ptr %p, ptr %p.addr, align 8
150  store i32 4, ptr %len, align 4
151  %0 = load ptr, ptr %p.addr, align 8
152  %1 = load i32, ptr %0, align 4
153  %2 = load i32, ptr %len, align 4
154  %cmp = icmp slt i32 %1, %2
155  br i1 %cmp, label %if.then, label %if.else
156
157if.then:                                          ; preds = %entry
158  %3 = load ptr, ptr %p.addr, align 8
159  %4 = load i32, ptr %3, align 4
160  %idxprom = sext i32 %4 to i64
161  %arrayidx = getelementptr inbounds [4 x i32], ptr %a, i64 0, i64 %idxprom
162  %5 = load i32, ptr %arrayidx, align 4
163  store i32 %5, ptr %retval, align 4
164  br label %return
165
166if.else:                                          ; preds = %entry
167  store i32 -1, ptr %retval, align 4
168  br label %return
169
170return:                                           ; preds = %if.else, %if.then
171  %6 = load i32, ptr %retval, align 4
172  ret i32 %6
173}
174
175define dso_local ptr @_Z3bazv() {
176; CHECK-LABEL: _Z3bazv:
177; CHECK:       # %bb.0: # %entry
178; CHECK-NEXT:    lfence
179; CHECK-NEXT:    movq $_Z3barPi, -{{[0-9]+}}(%rsp)
180; CHECK-NEXT:    lfence
181; CHECK-NEXT:    #APP
182; CHECK-NEXT:    #NO_APP
183; CHECK-NEXT:    lfence
184; CHECK-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
185; CHECK-NEXT:    retq
186;
187; X86-ONE-LFENCE-LABEL: _Z3bazv:
188; X86-ONE-LFENCE:       # %bb.0: # %entry
189; X86-ONE-LFENCE-NEXT:    lfence
190; X86-ONE-LFENCE-NEXT:    movq $_Z3barPi, -{{[0-9]+}}(%rsp)
191; X86-ONE-LFENCE-NEXT:    #APP
192; X86-ONE-LFENCE-NEXT:    #NO_APP
193; X86-ONE-LFENCE-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
194; X86-ONE-LFENCE-NEXT:    retq
195;
196; X86-OMIT-BR-LABEL: _Z3bazv:
197; X86-OMIT-BR:       # %bb.0: # %entry
198; X86-OMIT-BR-NEXT:    lfence
199; X86-OMIT-BR-NEXT:    movq $_Z3barPi, -{{[0-9]+}}(%rsp)
200; X86-OMIT-BR-NEXT:    lfence
201; X86-OMIT-BR-NEXT:    #APP
202; X86-OMIT-BR-NEXT:    #NO_APP
203; X86-OMIT-BR-NEXT:    lfence
204; X86-OMIT-BR-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
205; X86-OMIT-BR-NEXT:    retq
206;
207; X86-NON-CONST-LABEL: _Z3bazv:
208; X86-NON-CONST:       # %bb.0: # %entry
209; X86-NON-CONST-NEXT:    lfence
210; X86-NON-CONST-NEXT:    movq $_Z3barPi, -{{[0-9]+}}(%rsp)
211; X86-NON-CONST-NEXT:    lfence
212; X86-NON-CONST-NEXT:    #APP
213; X86-NON-CONST-NEXT:    #NO_APP
214; X86-NON-CONST-NEXT:    lfence
215; X86-NON-CONST-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
216; X86-NON-CONST-NEXT:    retq
217entry:
218  %p = alloca ptr, align 8
219  store ptr @_Z3barPi, ptr %p, align 8
220  call void asm sideeffect "", "=*m,*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(ptr) %p, ptr elementtype(ptr) %p) #3, !srcloc !2
221  %0 = load ptr, ptr %p, align 8
222  ret ptr %0
223}
224
225define dso_local void @_Z3fooPi(ptr %p) {
226; CHECK-LABEL: _Z3fooPi:
227; CHECK:       # %bb.0: # %entry
228; CHECK-NEXT:    subq $24, %rsp
229; CHECK-NEXT:    .cfi_def_cfa_offset 32
230; CHECK-NEXT:    lfence
231; CHECK-NEXT:    movq %rdi, {{[0-9]+}}(%rsp)
232; CHECK-NEXT:    callq _Z3bazv
233; CHECK-NEXT:    lfence
234; CHECK-NEXT:    movq %rax, {{[0-9]+}}(%rsp)
235; CHECK-NEXT:    lfence
236; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rdi
237; CHECK-NEXT:    callq *%rax
238; CHECK-NEXT:    addq $24, %rsp
239; CHECK-NEXT:    .cfi_def_cfa_offset 8
240; CHECK-NEXT:    retq
241;
242; X86-ONE-LFENCE-LABEL: _Z3fooPi:
243; X86-ONE-LFENCE:       # %bb.0: # %entry
244; X86-ONE-LFENCE-NEXT:    subq $24, %rsp
245; X86-ONE-LFENCE-NEXT:    .cfi_def_cfa_offset 32
246; X86-ONE-LFENCE-NEXT:    lfence
247; X86-ONE-LFENCE-NEXT:    movq %rdi, {{[0-9]+}}(%rsp)
248; X86-ONE-LFENCE-NEXT:    callq _Z3bazv
249; X86-ONE-LFENCE-NEXT:    movq %rax, {{[0-9]+}}(%rsp)
250; X86-ONE-LFENCE-NEXT:    movq {{[0-9]+}}(%rsp), %rdi
251; X86-ONE-LFENCE-NEXT:    callq *%rax
252; X86-ONE-LFENCE-NEXT:    addq $24, %rsp
253; X86-ONE-LFENCE-NEXT:    .cfi_def_cfa_offset 8
254; X86-ONE-LFENCE-NEXT:    retq
255;
256; X86-OMIT-BR-LABEL: _Z3fooPi:
257; X86-OMIT-BR:       # %bb.0: # %entry
258; X86-OMIT-BR-NEXT:    subq $24, %rsp
259; X86-OMIT-BR-NEXT:    .cfi_def_cfa_offset 32
260; X86-OMIT-BR-NEXT:    lfence
261; X86-OMIT-BR-NEXT:    movq %rdi, {{[0-9]+}}(%rsp)
262; X86-OMIT-BR-NEXT:    callq _Z3bazv
263; X86-OMIT-BR-NEXT:    lfence
264; X86-OMIT-BR-NEXT:    movq %rax, {{[0-9]+}}(%rsp)
265; X86-OMIT-BR-NEXT:    lfence
266; X86-OMIT-BR-NEXT:    movq {{[0-9]+}}(%rsp), %rdi
267; X86-OMIT-BR-NEXT:    callq *%rax
268; X86-OMIT-BR-NEXT:    addq $24, %rsp
269; X86-OMIT-BR-NEXT:    .cfi_def_cfa_offset 8
270; X86-OMIT-BR-NEXT:    retq
271;
272; X86-NON-CONST-LABEL: _Z3fooPi:
273; X86-NON-CONST:       # %bb.0: # %entry
274; X86-NON-CONST-NEXT:    subq $24, %rsp
275; X86-NON-CONST-NEXT:    .cfi_def_cfa_offset 32
276; X86-NON-CONST-NEXT:    lfence
277; X86-NON-CONST-NEXT:    movq %rdi, {{[0-9]+}}(%rsp)
278; X86-NON-CONST-NEXT:    callq _Z3bazv
279; X86-NON-CONST-NEXT:    lfence
280; X86-NON-CONST-NEXT:    movq %rax, {{[0-9]+}}(%rsp)
281; X86-NON-CONST-NEXT:    lfence
282; X86-NON-CONST-NEXT:    movq {{[0-9]+}}(%rsp), %rdi
283; X86-NON-CONST-NEXT:    callq *%rax
284; X86-NON-CONST-NEXT:    addq $24, %rsp
285; X86-NON-CONST-NEXT:    .cfi_def_cfa_offset 8
286; X86-NON-CONST-NEXT:    retq
287entry:
288  %p.addr = alloca ptr, align 8
289  %t = alloca ptr, align 8
290  store ptr %p, ptr %p.addr, align 8
291  %call = call ptr @_Z3bazv()
292  store ptr %call, ptr %t, align 8
293  %0 = load ptr, ptr %t, align 8
294  %1 = load ptr, ptr %p.addr, align 8
295  %call1 = call i32 %0(ptr %1)
296  ret void
297}
298
299!2 = !{i32 233}
300