xref: /llvm-project/llvm/test/CodeGen/X86/select.ll (revision ffeef7599af94694191458a0e2a131e122181a13) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin10               | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom    | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon    | FileCheck %s --check-prefix=ATHLON
5; RUN: llc < %s -mtriple=i386-intel-elfiamcu                 | FileCheck %s --check-prefix=MCU
6
7; PR5757
8%0 = type { i64, i32 }
9
10define i32 @test1(ptr %p, ptr %q, i1 %r) nounwind {
11; GENERIC-LABEL: test1:
12; GENERIC:       ## %bb.0:
13; GENERIC-NEXT:    testb $1, %dl
14; GENERIC-NEXT:    cmoveq %rsi, %rdi
15; GENERIC-NEXT:    movl 8(%rdi), %eax
16; GENERIC-NEXT:    retq
17;
18; ATOM-LABEL: test1:
19; ATOM:       ## %bb.0:
20; ATOM-NEXT:    testb $1, %dl
21; ATOM-NEXT:    cmoveq %rsi, %rdi
22; ATOM-NEXT:    movl 8(%rdi), %eax
23; ATOM-NEXT:    nop
24; ATOM-NEXT:    nop
25; ATOM-NEXT:    retq
26;
27; ATHLON-LABEL: test1:
28; ATHLON:       ## %bb.0:
29; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
30; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
31; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
32; ATHLON-NEXT:    cmovnel %eax, %ecx
33; ATHLON-NEXT:    movl (%ecx), %eax
34; ATHLON-NEXT:    movl 8(%eax), %eax
35; ATHLON-NEXT:    retl
36;
37; MCU-LABEL: test1:
38; MCU:       # %bb.0:
39; MCU-NEXT:    testb $1, %cl
40; MCU-NEXT:    jne .LBB0_2
41; MCU-NEXT:  # %bb.1:
42; MCU-NEXT:    movl %edx, %eax
43; MCU-NEXT:  .LBB0_2:
44; MCU-NEXT:    movl 8(%eax), %eax
45; MCU-NEXT:    retl
46  %t0 = load %0, ptr %p
47  %t1 = load %0, ptr %q
48  %t4 = select i1 %r, %0 %t0, %0 %t1
49  %t5 = extractvalue %0 %t4, 1
50  ret i32 %t5
51}
52
53; PR2139
54define i32 @test2() nounwind {
55; GENERIC-LABEL: test2:
56; GENERIC:       ## %bb.0: ## %entry
57; GENERIC-NEXT:    pushq %rax
58; GENERIC-NEXT:    callq _return_false
59; GENERIC-NEXT:    xorl %ecx, %ecx
60; GENERIC-NEXT:    testb $1, %al
61; GENERIC-NEXT:    movl $-3840, %eax ## imm = 0xF100
62; GENERIC-NEXT:    cmovnel %ecx, %eax
63; GENERIC-NEXT:    cmpl $32768, %eax ## imm = 0x8000
64; GENERIC-NEXT:    jge LBB1_1
65; GENERIC-NEXT:  ## %bb.2: ## %bb91
66; GENERIC-NEXT:    xorl %eax, %eax
67; GENERIC-NEXT:    popq %rcx
68; GENERIC-NEXT:    retq
69; GENERIC-NEXT:  LBB1_1: ## %bb90
70; GENERIC-NEXT:    ud2
71;
72; ATOM-LABEL: test2:
73; ATOM:       ## %bb.0: ## %entry
74; ATOM-NEXT:    pushq %rax
75; ATOM-NEXT:    callq _return_false
76; ATOM-NEXT:    xorl %ecx, %ecx
77; ATOM-NEXT:    movl $-3840, %edx ## imm = 0xF100
78; ATOM-NEXT:    testb $1, %al
79; ATOM-NEXT:    cmovnel %ecx, %edx
80; ATOM-NEXT:    cmpl $32768, %edx ## imm = 0x8000
81; ATOM-NEXT:    jge LBB1_1
82; ATOM-NEXT:  ## %bb.2: ## %bb91
83; ATOM-NEXT:    xorl %eax, %eax
84; ATOM-NEXT:    popq %rcx
85; ATOM-NEXT:    retq
86; ATOM-NEXT:  LBB1_1: ## %bb90
87; ATOM-NEXT:    ud2
88;
89; ATHLON-LABEL: test2:
90; ATHLON:       ## %bb.0: ## %entry
91; ATHLON-NEXT:    subl $12, %esp
92; ATHLON-NEXT:    calll _return_false
93; ATHLON-NEXT:    xorl %ecx, %ecx
94; ATHLON-NEXT:    testb $1, %al
95; ATHLON-NEXT:    movl $-3840, %eax ## imm = 0xF100
96; ATHLON-NEXT:    cmovnel %ecx, %eax
97; ATHLON-NEXT:    cmpl $32768, %eax ## imm = 0x8000
98; ATHLON-NEXT:    jge LBB1_1
99; ATHLON-NEXT:  ## %bb.2: ## %bb91
100; ATHLON-NEXT:    xorl %eax, %eax
101; ATHLON-NEXT:    addl $12, %esp
102; ATHLON-NEXT:    retl
103; ATHLON-NEXT:  LBB1_1: ## %bb90
104; ATHLON-NEXT:    ud2
105;
106; MCU-LABEL: test2:
107; MCU:       # %bb.0: # %entry
108; MCU-NEXT:    calll return_false@PLT
109; MCU-NEXT:    movzbl %al, %eax
110; MCU-NEXT:    andl $1, %eax
111; MCU-NEXT:    decl %eax
112; MCU-NEXT:    andl $-3840, %eax # imm = 0xF100
113; MCU-NEXT:    cmpl $32768, %eax # imm = 0x8000
114; MCU-NEXT:    jge .LBB1_1
115; MCU-NEXT:  # %bb.2: # %bb91
116; MCU-NEXT:    xorl %eax, %eax
117; MCU-NEXT:    retl
118; MCU-NEXT:  .LBB1_1: # %bb90
119entry:
120  %tmp73 = tail call i1 @return_false()
121  %g.0 = select i1 %tmp73, i16 0, i16 -480
122  %tmp7778 = sext i16 %g.0 to i32
123  %tmp80 = shl i32 %tmp7778, 3
124  %tmp87 = icmp sgt i32 %tmp80, 32767
125  br i1 %tmp87, label %bb90, label %bb91
126bb90:
127  unreachable
128bb91:
129  ret i32 0
130}
131
132declare i1 @return_false()
133
134;; Select between two floating point constants.
135define float @test3(i32 %x) nounwind readnone {
136; GENERIC-LABEL: test3:
137; GENERIC:       ## %bb.0: ## %entry
138; GENERIC-NEXT:    xorl %eax, %eax
139; GENERIC-NEXT:    testl %edi, %edi
140; GENERIC-NEXT:    sete %al
141; GENERIC-NEXT:    leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx
142; GENERIC-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
143; GENERIC-NEXT:    retq
144;
145; ATOM-LABEL: test3:
146; ATOM:       ## %bb.0: ## %entry
147; ATOM-NEXT:    xorl %eax, %eax
148; ATOM-NEXT:    leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx
149; ATOM-NEXT:    testl %edi, %edi
150; ATOM-NEXT:    sete %al
151; ATOM-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
152; ATOM-NEXT:    retq
153;
154; ATHLON-LABEL: test3:
155; ATHLON:       ## %bb.0: ## %entry
156; ATHLON-NEXT:    xorl %eax, %eax
157; ATHLON-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
158; ATHLON-NEXT:    sete %al
159; ATHLON-NEXT:    flds {{\.?LCPI[0-9]+_[0-9]+}}(,%eax,4)
160; ATHLON-NEXT:    retl
161;
162; MCU-LABEL: test3:
163; MCU:       # %bb.0: # %entry
164; MCU-NEXT:    xorl %ecx, %ecx
165; MCU-NEXT:    testl %eax, %eax
166; MCU-NEXT:    sete %cl
167; MCU-NEXT:    flds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)
168; MCU-NEXT:    retl
169entry:
170  %0 = icmp eq i32 %x, 0
171  %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
172  ret float %iftmp.0.0
173}
174
175define signext i8 @test4(ptr nocapture %P, double %F) nounwind readonly {
176; CHECK-LABEL: test4:
177; CHECK:       ## %bb.0: ## %entry
178; CHECK-NEXT:    movsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]
179; CHECK-NEXT:    xorl %eax, %eax
180; CHECK-NEXT:    ucomisd %xmm0, %xmm1
181; CHECK-NEXT:    seta %al
182; CHECK-NEXT:    movsbl (%rdi,%rax,4), %eax
183; CHECK-NEXT:    retq
184;
185; ATHLON-LABEL: test4:
186; ATHLON:       ## %bb.0: ## %entry
187; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
188; ATHLON-NEXT:    fldl {{[0-9]+}}(%esp)
189; ATHLON-NEXT:    flds {{\.?LCPI[0-9]+_[0-9]+}}
190; ATHLON-NEXT:    xorl %ecx, %ecx
191; ATHLON-NEXT:    fucompi %st(1), %st
192; ATHLON-NEXT:    fstp %st(0)
193; ATHLON-NEXT:    seta %cl
194; ATHLON-NEXT:    movsbl (%eax,%ecx,4), %eax
195; ATHLON-NEXT:    retl
196;
197; MCU-LABEL: test4:
198; MCU:       # %bb.0: # %entry
199; MCU-NEXT:    movl %eax, %ecx
200; MCU-NEXT:    fldl {{[0-9]+}}(%esp)
201; MCU-NEXT:    flds {{\.?LCPI[0-9]+_[0-9]+}}
202; MCU-NEXT:    fucompp
203; MCU-NEXT:    fnstsw %ax
204; MCU-NEXT:    xorl %edx, %edx
205; MCU-NEXT:    # kill: def $ah killed $ah killed $ax
206; MCU-NEXT:    sahf
207; MCU-NEXT:    seta %dl
208; MCU-NEXT:    movzbl (%ecx,%edx,4), %eax
209; MCU-NEXT:    retl
210entry:
211  %0 = fcmp olt double %F, 4.200000e+01
212  %iftmp.0.0 = select i1 %0, i32 4, i32 0
213  %1 = getelementptr i8, ptr %P, i32 %iftmp.0.0
214  %2 = load i8, ptr %1, align 1
215  ret i8 %2
216}
217
218define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, ptr %p) nounwind {
219; GENERIC-LABEL: test5:
220; GENERIC:       ## %bb.0:
221; GENERIC-NEXT:    testb $1, %dil
222; GENERIC-NEXT:    jne LBB4_2
223; GENERIC-NEXT:  ## %bb.1:
224; GENERIC-NEXT:    movaps %xmm1, %xmm0
225; GENERIC-NEXT:  LBB4_2:
226; GENERIC-NEXT:    movss %xmm0, (%rsi)
227; GENERIC-NEXT:    retq
228;
229; ATOM-LABEL: test5:
230; ATOM:       ## %bb.0:
231; ATOM-NEXT:    testb $1, %dil
232; ATOM-NEXT:    jne LBB4_2
233; ATOM-NEXT:  ## %bb.1:
234; ATOM-NEXT:    movaps %xmm1, %xmm0
235; ATOM-NEXT:  LBB4_2:
236; ATOM-NEXT:    movss %xmm0, (%rsi)
237; ATOM-NEXT:    nop
238; ATOM-NEXT:    nop
239; ATOM-NEXT:    retq
240;
241; ATHLON-LABEL: test5:
242; ATHLON:       ## %bb.0:
243; ATHLON-NEXT:    pushl %esi
244; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
245; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
246; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
247; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
248; ATHLON-NEXT:    cmovnel %ecx, %edx
249; ATHLON-NEXT:    movzwl (%edx), %ecx
250; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
251; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %esi
252; ATHLON-NEXT:    cmovnel %edx, %esi
253; ATHLON-NEXT:    movzwl (%esi), %edx
254; ATHLON-NEXT:    movw %dx, 2(%eax)
255; ATHLON-NEXT:    movw %cx, (%eax)
256; ATHLON-NEXT:    popl %esi
257; ATHLON-NEXT:    retl
258;
259; MCU-LABEL: test5:
260; MCU:       # %bb.0:
261; MCU-NEXT:    pushl %esi
262; MCU-NEXT:    movl {{[0-9]+}}(%esp), %esi
263; MCU-NEXT:    testb $1, %al
264; MCU-NEXT:    jne .LBB4_2
265; MCU-NEXT:  # %bb.1:
266; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
267; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %edx
268; MCU-NEXT:  .LBB4_2:
269; MCU-NEXT:    movw %cx, 2(%esi)
270; MCU-NEXT:    movw %dx, (%esi)
271; MCU-NEXT:    popl %esi
272; MCU-NEXT:    retl
273  %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
274  store <2 x i16> %x, ptr %p
275  ret void
276}
277
278; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
279define void @test6(i32 %C, ptr %A, ptr %B) nounwind {
280; CHECK-LABEL: test6:
281; CHECK:       ## %bb.0:
282; CHECK-NEXT:    testl %edi, %edi
283; CHECK-NEXT:    je LBB5_1
284; CHECK-NEXT:  ## %bb.2:
285; CHECK-NEXT:    movaps (%rsi), %xmm0
286; CHECK-NEXT:    movaps %xmm0, (%rsi)
287; CHECK-NEXT:    retq
288; CHECK-NEXT:  LBB5_1:
289; CHECK-NEXT:    movaps (%rdx), %xmm0
290; CHECK-NEXT:    mulps %xmm0, %xmm0
291; CHECK-NEXT:    movaps %xmm0, (%rsi)
292; CHECK-NEXT:    retq
293;
294; ATHLON-LABEL: test6:
295; ATHLON:       ## %bb.0:
296; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
297; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
298; ATHLON-NEXT:    flds 12(%eax)
299; ATHLON-NEXT:    flds 8(%eax)
300; ATHLON-NEXT:    flds 4(%eax)
301; ATHLON-NEXT:    flds (%eax)
302; ATHLON-NEXT:    flds (%ecx)
303; ATHLON-NEXT:    fmul %st, %st(0)
304; ATHLON-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
305; ATHLON-NEXT:    fxch %st(1)
306; ATHLON-NEXT:    fcmove %st(1), %st
307; ATHLON-NEXT:    fstp %st(1)
308; ATHLON-NEXT:    flds 4(%ecx)
309; ATHLON-NEXT:    fmul %st, %st(0)
310; ATHLON-NEXT:    fxch %st(2)
311; ATHLON-NEXT:    fcmove %st(2), %st
312; ATHLON-NEXT:    fstp %st(2)
313; ATHLON-NEXT:    flds 8(%ecx)
314; ATHLON-NEXT:    fmul %st, %st(0)
315; ATHLON-NEXT:    fxch %st(3)
316; ATHLON-NEXT:    fcmove %st(3), %st
317; ATHLON-NEXT:    fstp %st(3)
318; ATHLON-NEXT:    flds 12(%ecx)
319; ATHLON-NEXT:    fmul %st, %st(0)
320; ATHLON-NEXT:    fxch %st(4)
321; ATHLON-NEXT:    fcmove %st(4), %st
322; ATHLON-NEXT:    fstp %st(4)
323; ATHLON-NEXT:    fxch %st(3)
324; ATHLON-NEXT:    fstps 12(%eax)
325; ATHLON-NEXT:    fxch %st(1)
326; ATHLON-NEXT:    fstps 8(%eax)
327; ATHLON-NEXT:    fstps 4(%eax)
328; ATHLON-NEXT:    fstps (%eax)
329; ATHLON-NEXT:    retl
330;
331; MCU-LABEL: test6:
332; MCU:       # %bb.0:
333; MCU-NEXT:    pushl %eax
334; MCU-NEXT:    flds 12(%edx)
335; MCU-NEXT:    fstps (%esp) # 4-byte Folded Spill
336; MCU-NEXT:    flds 8(%edx)
337; MCU-NEXT:    flds 4(%edx)
338; MCU-NEXT:    flds (%ecx)
339; MCU-NEXT:    flds 4(%ecx)
340; MCU-NEXT:    flds 8(%ecx)
341; MCU-NEXT:    flds 12(%ecx)
342; MCU-NEXT:    fmul %st, %st(0)
343; MCU-NEXT:    fxch %st(1)
344; MCU-NEXT:    fmul %st, %st(0)
345; MCU-NEXT:    fxch %st(2)
346; MCU-NEXT:    fmul %st, %st(0)
347; MCU-NEXT:    fxch %st(3)
348; MCU-NEXT:    fmul %st, %st(0)
349; MCU-NEXT:    testl %eax, %eax
350; MCU-NEXT:    flds (%edx)
351; MCU-NEXT:    je .LBB5_2
352; MCU-NEXT:  # %bb.1:
353; MCU-NEXT:    fstp %st(1)
354; MCU-NEXT:    fstp %st(3)
355; MCU-NEXT:    fstp %st(1)
356; MCU-NEXT:    fstp %st(0)
357; MCU-NEXT:    flds (%esp) # 4-byte Folded Reload
358; MCU-NEXT:    fldz
359; MCU-NEXT:    fldz
360; MCU-NEXT:    fldz
361; MCU-NEXT:    fxch %st(1)
362; MCU-NEXT:    fxch %st(6)
363; MCU-NEXT:    fxch %st(1)
364; MCU-NEXT:    fxch %st(5)
365; MCU-NEXT:    fxch %st(4)
366; MCU-NEXT:    fxch %st(1)
367; MCU-NEXT:    fxch %st(3)
368; MCU-NEXT:    fxch %st(2)
369; MCU-NEXT:  .LBB5_2:
370; MCU-NEXT:    fstp %st(0)
371; MCU-NEXT:    fstp %st(5)
372; MCU-NEXT:    fstp %st(3)
373; MCU-NEXT:    fxch %st(2)
374; MCU-NEXT:    fstps 12(%edx)
375; MCU-NEXT:    fxch %st(1)
376; MCU-NEXT:    fstps 8(%edx)
377; MCU-NEXT:    fstps 4(%edx)
378; MCU-NEXT:    fstps (%edx)
379; MCU-NEXT:    popl %eax
380; MCU-NEXT:    retl
381  %tmp = load <4 x float>, ptr %A
382  %tmp3 = load <4 x float>, ptr %B
383  %tmp9 = fmul <4 x float> %tmp3, %tmp3
384  %tmp.upgrd.1 = icmp eq i32 %C, 0
385  %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
386  store <4 x float> %iftmp.38.0, ptr %A
387  ret void
388}
389
390; Select with fp80's
391define x86_fp80 @test7(i32 %tmp8) nounwind {
392; GENERIC-LABEL: test7:
393; GENERIC:       ## %bb.0:
394; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
395; GENERIC-NEXT:    notl %edi
396; GENERIC-NEXT:    shrl $27, %edi
397; GENERIC-NEXT:    andl $-16, %edi
398; GENERIC-NEXT:    leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax
399; GENERIC-NEXT:    fldt (%rdi,%rax)
400; GENERIC-NEXT:    retq
401;
402; ATOM-LABEL: test7:
403; ATOM:       ## %bb.0:
404; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
405; ATOM-NEXT:    leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax
406; ATOM-NEXT:    notl %edi
407; ATOM-NEXT:    shrl $27, %edi
408; ATOM-NEXT:    andl $-16, %edi
409; ATOM-NEXT:    fldt (%rdi,%rax)
410; ATOM-NEXT:    retq
411;
412; ATHLON-LABEL: test7:
413; ATHLON:       ## %bb.0:
414; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
415; ATHLON-NEXT:    notl %eax
416; ATHLON-NEXT:    shrl $27, %eax
417; ATHLON-NEXT:    andl $-16, %eax
418; ATHLON-NEXT:    fldt {{\.?LCPI[0-9]+_[0-9]+}}(%eax)
419; ATHLON-NEXT:    retl
420;
421; MCU-LABEL: test7:
422; MCU:       # %bb.0:
423; MCU-NEXT:    notl %eax
424; MCU-NEXT:    shrl $27, %eax
425; MCU-NEXT:    andl $-16, %eax
426; MCU-NEXT:    fldt {{\.?LCPI[0-9]+_[0-9]+}}(%eax)
427; MCU-NEXT:    retl
428  %tmp9 = icmp sgt i32 %tmp8, -1
429  %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
430  ret x86_fp80 %retval
431}
432
433; widening select v6i32 and then a sub
434define void @test8(i1 %c, ptr %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
435; GENERIC-LABEL: test8:
436; GENERIC:       ## %bb.0:
437; GENERIC-NEXT:    testb $1, %dil
438; GENERIC-NEXT:    jne LBB7_1
439; GENERIC-NEXT:  ## %bb.2:
440; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
441; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
442; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
443; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
444; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
445; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
446; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
447; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
448; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
449; GENERIC-NEXT:    jmp LBB7_3
450; GENERIC-NEXT:  LBB7_1:
451; GENERIC-NEXT:    movd %r9d, %xmm0
452; GENERIC-NEXT:    movd %r8d, %xmm1
453; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
454; GENERIC-NEXT:    movd %ecx, %xmm2
455; GENERIC-NEXT:    movd %edx, %xmm0
456; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
457; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
458; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
459; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
460; GENERIC-NEXT:  LBB7_3:
461; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
462; GENERIC-NEXT:    pcmpeqd %xmm2, %xmm2
463; GENERIC-NEXT:    paddd %xmm2, %xmm0
464; GENERIC-NEXT:    paddd %xmm2, %xmm1
465; GENERIC-NEXT:    movq %xmm1, 16(%rsi)
466; GENERIC-NEXT:    movdqa %xmm0, (%rsi)
467; GENERIC-NEXT:    retq
468;
469; ATOM-LABEL: test8:
470; ATOM:       ## %bb.0:
471; ATOM-NEXT:    testb $1, %dil
472; ATOM-NEXT:    jne LBB7_1
473; ATOM-NEXT:  ## %bb.2:
474; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
475; ATOM-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
476; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
477; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
478; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
479; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
480; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
481; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
482; ATOM-NEXT:    jmp LBB7_3
483; ATOM-NEXT:  LBB7_1:
484; ATOM-NEXT:    movd %r9d, %xmm1
485; ATOM-NEXT:    movd %r8d, %xmm2
486; ATOM-NEXT:    movd %ecx, %xmm3
487; ATOM-NEXT:    movd %edx, %xmm0
488; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
489; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
490; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
491; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
492; ATOM-NEXT:  LBB7_3:
493; ATOM-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
494; ATOM-NEXT:    pcmpeqd %xmm2, %xmm2
495; ATOM-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
496; ATOM-NEXT:    paddd %xmm2, %xmm0
497; ATOM-NEXT:    paddd %xmm2, %xmm1
498; ATOM-NEXT:    movq %xmm1, 16(%rsi)
499; ATOM-NEXT:    movdqa %xmm0, (%rsi)
500; ATOM-NEXT:    retq
501;
502; ATHLON-LABEL: test8:
503; ATHLON:       ## %bb.0:
504; ATHLON-NEXT:    pushl %ebp
505; ATHLON-NEXT:    pushl %ebx
506; ATHLON-NEXT:    pushl %edi
507; ATHLON-NEXT:    pushl %esi
508; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
509; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
510; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ebx
511; ATHLON-NEXT:    cmovnel %eax, %ebx
512; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
513; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edi
514; ATHLON-NEXT:    cmovnel %eax, %edi
515; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
516; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %esi
517; ATHLON-NEXT:    cmovnel %eax, %esi
518; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
519; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
520; ATHLON-NEXT:    cmovnel %eax, %edx
521; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
522; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
523; ATHLON-NEXT:    cmovnel %eax, %ecx
524; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ebp
525; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
526; ATHLON-NEXT:    cmovnel %ebp, %eax
527; ATHLON-NEXT:    movl (%ebx), %ebp
528; ATHLON-NEXT:    movl (%edi), %ebx
529; ATHLON-NEXT:    movl (%esi), %edi
530; ATHLON-NEXT:    movl (%edx), %esi
531; ATHLON-NEXT:    movl (%ecx), %edx
532; ATHLON-NEXT:    movl (%eax), %ecx
533; ATHLON-NEXT:    decl %ebp
534; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
535; ATHLON-NEXT:    movl %ebp, 20(%eax)
536; ATHLON-NEXT:    decl %ebx
537; ATHLON-NEXT:    movl %ebx, 16(%eax)
538; ATHLON-NEXT:    decl %edi
539; ATHLON-NEXT:    movl %edi, 12(%eax)
540; ATHLON-NEXT:    decl %esi
541; ATHLON-NEXT:    movl %esi, 8(%eax)
542; ATHLON-NEXT:    decl %edx
543; ATHLON-NEXT:    movl %edx, 4(%eax)
544; ATHLON-NEXT:    decl %ecx
545; ATHLON-NEXT:    movl %ecx, (%eax)
546; ATHLON-NEXT:    popl %esi
547; ATHLON-NEXT:    popl %edi
548; ATHLON-NEXT:    popl %ebx
549; ATHLON-NEXT:    popl %ebp
550; ATHLON-NEXT:    retl
551;
552; MCU-LABEL: test8:
553; MCU:       # %bb.0:
554; MCU-NEXT:    pushl %ebp
555; MCU-NEXT:    pushl %ebx
556; MCU-NEXT:    pushl %edi
557; MCU-NEXT:    pushl %esi
558; MCU-NEXT:    testb $1, %al
559; MCU-NEXT:    jne .LBB7_1
560; MCU-NEXT:  # %bb.2:
561; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
562; MCU-NEXT:    je .LBB7_5
563; MCU-NEXT:  .LBB7_4:
564; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
565; MCU-NEXT:    je .LBB7_8
566; MCU-NEXT:  .LBB7_7:
567; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
568; MCU-NEXT:    je .LBB7_11
569; MCU-NEXT:  .LBB7_10:
570; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
571; MCU-NEXT:    je .LBB7_14
572; MCU-NEXT:  .LBB7_13:
573; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
574; MCU-NEXT:    jmp .LBB7_15
575; MCU-NEXT:  .LBB7_1:
576; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
577; MCU-NEXT:    jne .LBB7_4
578; MCU-NEXT:  .LBB7_5:
579; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
580; MCU-NEXT:    jne .LBB7_7
581; MCU-NEXT:  .LBB7_8:
582; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
583; MCU-NEXT:    jne .LBB7_10
584; MCU-NEXT:  .LBB7_11:
585; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
586; MCU-NEXT:    jne .LBB7_13
587; MCU-NEXT:  .LBB7_14:
588; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
589; MCU-NEXT:  .LBB7_15:
590; MCU-NEXT:    movl (%edi), %ebx
591; MCU-NEXT:    movl (%ecx), %edi
592; MCU-NEXT:    movl (%esi), %esi
593; MCU-NEXT:    movl (%ebp), %ecx
594; MCU-NEXT:    movl (%eax), %eax
595; MCU-NEXT:    jne .LBB7_16
596; MCU-NEXT:  # %bb.17:
597; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
598; MCU-NEXT:    jmp .LBB7_18
599; MCU-NEXT:  .LBB7_16:
600; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
601; MCU-NEXT:  .LBB7_18:
602; MCU-NEXT:    movl (%ebp), %ebp
603; MCU-NEXT:    decl %ebp
604; MCU-NEXT:    decl %eax
605; MCU-NEXT:    decl %ecx
606; MCU-NEXT:    decl %esi
607; MCU-NEXT:    decl %edi
608; MCU-NEXT:    decl %ebx
609; MCU-NEXT:    movl %ebx, 20(%edx)
610; MCU-NEXT:    movl %edi, 16(%edx)
611; MCU-NEXT:    movl %esi, 12(%edx)
612; MCU-NEXT:    movl %ecx, 8(%edx)
613; MCU-NEXT:    movl %eax, 4(%edx)
614; MCU-NEXT:    movl %ebp, (%edx)
615; MCU-NEXT:    popl %esi
616; MCU-NEXT:    popl %edi
617; MCU-NEXT:    popl %ebx
618; MCU-NEXT:    popl %ebp
619; MCU-NEXT:    retl
620  %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
621  %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
622  store <6 x i32> %val, ptr %dst.addr
623  ret void
624}
625
626
627;; Test integer select between values and constants.
628
629define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
630; CHECK-LABEL: test9:
631; CHECK:       ## %bb.0:
632; CHECK-NEXT:    xorl %eax, %eax
633; CHECK-NEXT:    cmpq $1, %rdi
634; CHECK-NEXT:    sbbq %rax, %rax
635; CHECK-NEXT:    orq %rsi, %rax
636; CHECK-NEXT:    retq
637;
638; ATHLON-LABEL: test9:
639; ATHLON:       ## %bb.0:
640; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
641; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
642; ATHLON-NEXT:    movl $-1, %eax
643; ATHLON-NEXT:    movl $-1, %edx
644; ATHLON-NEXT:    je LBB8_2
645; ATHLON-NEXT:  ## %bb.1:
646; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
647; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
648; ATHLON-NEXT:  LBB8_2:
649; ATHLON-NEXT:    retl
650;
651; MCU-LABEL: test9:
652; MCU:       # %bb.0:
653; MCU-NEXT:    orl %edx, %eax
654; MCU-NEXT:    jne .LBB8_1
655; MCU-NEXT:  # %bb.2:
656; MCU-NEXT:    movl $-1, %eax
657; MCU-NEXT:    movl $-1, %edx
658; MCU-NEXT:    retl
659; MCU-NEXT:  .LBB8_1:
660; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
661; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
662; MCU-NEXT:    retl
663  %cmp = icmp ne i64 %x, 0
664  %cond = select i1 %cmp, i64 %y, i64 -1
665  ret i64 %cond
666}
667
668;; Same as test9
669define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
670; CHECK-LABEL: test9a:
671; CHECK:       ## %bb.0:
672; CHECK-NEXT:    xorl %eax, %eax
673; CHECK-NEXT:    cmpq $1, %rdi
674; CHECK-NEXT:    sbbq %rax, %rax
675; CHECK-NEXT:    orq %rsi, %rax
676; CHECK-NEXT:    retq
677;
678; ATHLON-LABEL: test9a:
679; ATHLON:       ## %bb.0:
680; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
681; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
682; ATHLON-NEXT:    movl $-1, %eax
683; ATHLON-NEXT:    movl $-1, %edx
684; ATHLON-NEXT:    je LBB9_2
685; ATHLON-NEXT:  ## %bb.1:
686; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
687; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
688; ATHLON-NEXT:  LBB9_2:
689; ATHLON-NEXT:    retl
690;
691; MCU-LABEL: test9a:
692; MCU:       # %bb.0:
693; MCU-NEXT:    orl %edx, %eax
694; MCU-NEXT:    movl $-1, %eax
695; MCU-NEXT:    movl $-1, %edx
696; MCU-NEXT:    je .LBB9_2
697; MCU-NEXT:  # %bb.1:
698; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
699; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
700; MCU-NEXT:  .LBB9_2:
701; MCU-NEXT:    retl
702  %cmp = icmp eq i64 %x, 0
703  %cond = select i1 %cmp, i64 -1, i64 %y
704  ret i64 %cond
705}
706
707define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
708; CHECK-LABEL: test9b:
709; CHECK:       ## %bb.0:
710; CHECK-NEXT:    xorl %eax, %eax
711; CHECK-NEXT:    cmpq $1, %rdi
712; CHECK-NEXT:    sbbq %rax, %rax
713; CHECK-NEXT:    orq %rsi, %rax
714; CHECK-NEXT:    retq
715;
716; ATHLON-LABEL: test9b:
717; ATHLON:       ## %bb.0:
718; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
719; ATHLON-NEXT:    xorl %edx, %edx
720; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
721; ATHLON-NEXT:    sete %dl
722; ATHLON-NEXT:    negl %edx
723; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
724; ATHLON-NEXT:    orl %edx, %eax
725; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %edx
726; ATHLON-NEXT:    retl
727;
728; MCU-LABEL: test9b:
729; MCU:       # %bb.0:
730; MCU-NEXT:    movl %edx, %ecx
731; MCU-NEXT:    xorl %edx, %edx
732; MCU-NEXT:    orl %ecx, %eax
733; MCU-NEXT:    sete %dl
734; MCU-NEXT:    negl %edx
735; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
736; MCU-NEXT:    orl %edx, %eax
737; MCU-NEXT:    orl {{[0-9]+}}(%esp), %edx
738; MCU-NEXT:    retl
739  %cmp = icmp eq i64 %x, 0
740  %A = sext i1 %cmp to i64
741  %cond = or i64 %y, %A
742  ret i64 %cond
743}
744
745;; Select between -1 and 1.
746define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
747; CHECK-LABEL: test10:
748; CHECK:       ## %bb.0:
749; CHECK-NEXT:    xorl %eax, %eax
750; CHECK-NEXT:    cmpq $1, %rdi
751; CHECK-NEXT:    sbbq %rax, %rax
752; CHECK-NEXT:    orq $1, %rax
753; CHECK-NEXT:    retq
754;
755; ATHLON-LABEL: test10:
756; ATHLON:       ## %bb.0:
757; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
758; ATHLON-NEXT:    xorl %edx, %edx
759; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
760; ATHLON-NEXT:    sete %dl
761; ATHLON-NEXT:    negl %edx
762; ATHLON-NEXT:    movl %edx, %eax
763; ATHLON-NEXT:    orl $1, %eax
764; ATHLON-NEXT:    retl
765;
766; MCU-LABEL: test10:
767; MCU:       # %bb.0:
768; MCU-NEXT:    movl %edx, %ecx
769; MCU-NEXT:    xorl %edx, %edx
770; MCU-NEXT:    orl %ecx, %eax
771; MCU-NEXT:    sete %dl
772; MCU-NEXT:    negl %edx
773; MCU-NEXT:    movl %edx, %eax
774; MCU-NEXT:    orl $1, %eax
775; MCU-NEXT:    retl
776  %cmp = icmp eq i64 %x, 0
777  %cond = select i1 %cmp, i64 -1, i64 1
778  ret i64 %cond
779}
780
781define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
782; CHECK-LABEL: test11:
783; CHECK:       ## %bb.0:
784; CHECK-NEXT:    xorl %eax, %eax
785; CHECK-NEXT:    negq %rdi
786; CHECK-NEXT:    sbbq %rax, %rax
787; CHECK-NEXT:    orq %rsi, %rax
788; CHECK-NEXT:    retq
789;
790; ATHLON-LABEL: test11:
791; ATHLON:       ## %bb.0:
792; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
793; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
794; ATHLON-NEXT:    movl $-1, %eax
795; ATHLON-NEXT:    movl $-1, %edx
796; ATHLON-NEXT:    jne LBB12_2
797; ATHLON-NEXT:  ## %bb.1:
798; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
799; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
800; ATHLON-NEXT:  LBB12_2:
801; ATHLON-NEXT:    retl
802;
803; MCU-LABEL: test11:
804; MCU:       # %bb.0:
805; MCU-NEXT:    orl %edx, %eax
806; MCU-NEXT:    je .LBB12_1
807; MCU-NEXT:  # %bb.2:
808; MCU-NEXT:    movl $-1, %eax
809; MCU-NEXT:    movl $-1, %edx
810; MCU-NEXT:    retl
811; MCU-NEXT:  .LBB12_1:
812; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
813; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
814; MCU-NEXT:    retl
815  %cmp = icmp eq i64 %x, 0
816  %cond = select i1 %cmp, i64 %y, i64 -1
817  ret i64 %cond
818}
819
820define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
821; CHECK-LABEL: test11a:
822; CHECK:       ## %bb.0:
823; CHECK-NEXT:    xorl %eax, %eax
824; CHECK-NEXT:    negq %rdi
825; CHECK-NEXT:    sbbq %rax, %rax
826; CHECK-NEXT:    orq %rsi, %rax
827; CHECK-NEXT:    retq
828;
829; ATHLON-LABEL: test11a:
830; ATHLON:       ## %bb.0:
831; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
832; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
833; ATHLON-NEXT:    movl $-1, %eax
834; ATHLON-NEXT:    movl $-1, %edx
835; ATHLON-NEXT:    jne LBB13_2
836; ATHLON-NEXT:  ## %bb.1:
837; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
838; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
839; ATHLON-NEXT:  LBB13_2:
840; ATHLON-NEXT:    retl
841;
842; MCU-LABEL: test11a:
843; MCU:       # %bb.0:
844; MCU-NEXT:    orl %edx, %eax
845; MCU-NEXT:    movl $-1, %eax
846; MCU-NEXT:    movl $-1, %edx
847; MCU-NEXT:    jne .LBB13_2
848; MCU-NEXT:  # %bb.1:
849; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
850; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
851; MCU-NEXT:  .LBB13_2:
852; MCU-NEXT:    retl
853  %cmp = icmp ne i64 %x, 0
854  %cond = select i1 %cmp, i64 -1, i64 %y
855  ret i64 %cond
856}
857
858define i32 @eqzero_const_or_all_ones(i32 %x) {
859; CHECK-LABEL: eqzero_const_or_all_ones:
860; CHECK:       ## %bb.0:
861; CHECK-NEXT:    xorl %eax, %eax
862; CHECK-NEXT:    negl %edi
863; CHECK-NEXT:    sbbl %eax, %eax
864; CHECK-NEXT:    orl $42, %eax
865; CHECK-NEXT:    retq
866;
867; ATHLON-LABEL: eqzero_const_or_all_ones:
868; ATHLON:       ## %bb.0:
869; ATHLON-NEXT:    xorl %eax, %eax
870; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %eax
871; ATHLON-NEXT:    sbbl %eax, %eax
872; ATHLON-NEXT:    orl $42, %eax
873; ATHLON-NEXT:    retl
874;
875; MCU-LABEL: eqzero_const_or_all_ones:
876; MCU:       # %bb.0:
877; MCU-NEXT:    xorl %ecx, %ecx
878; MCU-NEXT:    negl %eax
879; MCU-NEXT:    sbbl %ecx, %ecx
880; MCU-NEXT:    orl $42, %ecx
881; MCU-NEXT:    movl %ecx, %eax
882; MCU-NEXT:    retl
883  %z = icmp eq i32 %x, 0
884  %r = select i1 %z, i32 42, i32 -1
885  ret i32 %r
886}
887
888define i32 @nezero_const_or_all_ones(i32 %x) {
889; CHECK-LABEL: nezero_const_or_all_ones:
890; CHECK:       ## %bb.0:
891; CHECK-NEXT:    xorl %eax, %eax
892; CHECK-NEXT:    cmpl $1, %edi
893; CHECK-NEXT:    sbbl %eax, %eax
894; CHECK-NEXT:    orl $42, %eax
895; CHECK-NEXT:    retq
896;
897; ATHLON-LABEL: nezero_const_or_all_ones:
898; ATHLON:       ## %bb.0:
899; ATHLON-NEXT:    xorl %eax, %eax
900; ATHLON-NEXT:    cmpl $1, {{[0-9]+}}(%esp)
901; ATHLON-NEXT:    sbbl %eax, %eax
902; ATHLON-NEXT:    orl $42, %eax
903; ATHLON-NEXT:    retl
904;
905; MCU-LABEL: nezero_const_or_all_ones:
906; MCU:       # %bb.0:
907; MCU-NEXT:    xorl %ecx, %ecx
908; MCU-NEXT:    cmpl $1, %eax
909; MCU-NEXT:    sbbl %ecx, %ecx
910; MCU-NEXT:    orl $42, %ecx
911; MCU-NEXT:    movl %ecx, %eax
912; MCU-NEXT:    retl
913  %z = icmp ne i32 %x, 0
914  %r = select i1 %z, i32 42, i32 -1
915  ret i32 %r
916}
917
918define i64 @eqzero_all_ones_or_const(i64 %x) {
919; CHECK-LABEL: eqzero_all_ones_or_const:
920; CHECK:       ## %bb.0:
921; CHECK-NEXT:    xorl %eax, %eax
922; CHECK-NEXT:    cmpq $1, %rdi
923; CHECK-NEXT:    sbbq %rax, %rax
924; CHECK-NEXT:    orq $42, %rax
925; CHECK-NEXT:    retq
926;
927; ATHLON-LABEL: eqzero_all_ones_or_const:
928; ATHLON:       ## %bb.0:
929; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
930; ATHLON-NEXT:    xorl %edx, %edx
931; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
932; ATHLON-NEXT:    sete %dl
933; ATHLON-NEXT:    negl %edx
934; ATHLON-NEXT:    movl %edx, %eax
935; ATHLON-NEXT:    orl $42, %eax
936; ATHLON-NEXT:    retl
937;
938; MCU-LABEL: eqzero_all_ones_or_const:
939; MCU:       # %bb.0:
940; MCU-NEXT:    movl %edx, %ecx
941; MCU-NEXT:    xorl %edx, %edx
942; MCU-NEXT:    orl %ecx, %eax
943; MCU-NEXT:    sete %dl
944; MCU-NEXT:    negl %edx
945; MCU-NEXT:    movl %edx, %eax
946; MCU-NEXT:    orl $42, %eax
947; MCU-NEXT:    retl
948  %z = icmp eq i64 %x, 0
949  %r = select i1 %z, i64 -1, i64 42
950  ret i64 %r
951}
952
953define i8 @nezero_all_ones_or_const(i8 %x) {
954; CHECK-LABEL: nezero_all_ones_or_const:
955; CHECK:       ## %bb.0:
956; CHECK-NEXT:    xorl %eax, %eax
957; CHECK-NEXT:    negb %dil
958; CHECK-NEXT:    sbbl %eax, %eax
959; CHECK-NEXT:    orb $42, %al
960; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
961; CHECK-NEXT:    retq
962;
963; ATHLON-LABEL: nezero_all_ones_or_const:
964; ATHLON:       ## %bb.0:
965; ATHLON-NEXT:    xorl %eax, %eax
966; ATHLON-NEXT:    cmpb {{[0-9]+}}(%esp), %al
967; ATHLON-NEXT:    sbbl %eax, %eax
968; ATHLON-NEXT:    orb $42, %al
969; ATHLON-NEXT:    ## kill: def $al killed $al killed $eax
970; ATHLON-NEXT:    retl
971;
972; MCU-LABEL: nezero_all_ones_or_const:
973; MCU:       # %bb.0:
974; MCU-NEXT:    xorl %ecx, %ecx
975; MCU-NEXT:    negb %al
976; MCU-NEXT:    sbbl %ecx, %ecx
977; MCU-NEXT:    orb $42, %cl
978; MCU-NEXT:    movl %ecx, %eax
979; MCU-NEXT:    retl
980  %z = icmp ne i8 %x, 0
981  %r = select i1 %z, i8 -1, i8 42
982  ret i8 %r
983}
984
985define i32 @PR53006(i32 %x) {
986; CHECK-LABEL: PR53006:
987; CHECK:       ## %bb.0:
988; CHECK-NEXT:    xorl %eax, %eax
989; CHECK-NEXT:    negl %edi
990; CHECK-NEXT:    sbbl %eax, %eax
991; CHECK-NEXT:    orl $1, %eax
992; CHECK-NEXT:    retq
993;
994; ATHLON-LABEL: PR53006:
995; ATHLON:       ## %bb.0:
996; ATHLON-NEXT:    xorl %eax, %eax
997; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %eax
998; ATHLON-NEXT:    sbbl %eax, %eax
999; ATHLON-NEXT:    orl $1, %eax
1000; ATHLON-NEXT:    retl
1001;
1002; MCU-LABEL: PR53006:
1003; MCU:       # %bb.0:
1004; MCU-NEXT:    xorl %ecx, %ecx
1005; MCU-NEXT:    negl %eax
1006; MCU-NEXT:    sbbl %ecx, %ecx
1007; MCU-NEXT:    orl $1, %ecx
1008; MCU-NEXT:    movl %ecx, %eax
1009; MCU-NEXT:    retl
1010  %z = icmp eq i32 %x, 0
1011  %r = select i1 %z, i32 1, i32 -1
1012  ret i32 %r
1013}
1014
1015define i32 @test13(i32 %a, i32 %b) nounwind {
1016; GENERIC-LABEL: test13:
1017; GENERIC:       ## %bb.0:
1018; GENERIC-NEXT:    xorl %eax, %eax
1019; GENERIC-NEXT:    cmpl %esi, %edi
1020; GENERIC-NEXT:    sbbl %eax, %eax
1021; GENERIC-NEXT:    retq
1022;
1023; ATOM-LABEL: test13:
1024; ATOM:       ## %bb.0:
1025; ATOM-NEXT:    xorl %eax, %eax
1026; ATOM-NEXT:    cmpl %esi, %edi
1027; ATOM-NEXT:    sbbl %eax, %eax
1028; ATOM-NEXT:    nop
1029; ATOM-NEXT:    nop
1030; ATOM-NEXT:    retq
1031;
1032; ATHLON-LABEL: test13:
1033; ATHLON:       ## %bb.0:
1034; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1035; ATHLON-NEXT:    xorl %eax, %eax
1036; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %ecx
1037; ATHLON-NEXT:    sbbl %eax, %eax
1038; ATHLON-NEXT:    retl
1039;
1040; MCU-LABEL: test13:
1041; MCU:       # %bb.0:
1042; MCU-NEXT:    xorl %ecx, %ecx
1043; MCU-NEXT:    cmpl %edx, %eax
1044; MCU-NEXT:    sbbl %ecx, %ecx
1045; MCU-NEXT:    movl %ecx, %eax
1046; MCU-NEXT:    retl
1047  %c = icmp ult i32 %a, %b
1048  %d = sext i1 %c to i32
1049  ret i32 %d
1050}
1051
1052define i32 @test14(i32 %a, i32 %b) nounwind {
1053; GENERIC-LABEL: test14:
1054; GENERIC:       ## %bb.0:
1055; GENERIC-NEXT:    xorl %eax, %eax
1056; GENERIC-NEXT:    cmpl %esi, %edi
1057; GENERIC-NEXT:    adcl $-1, %eax
1058; GENERIC-NEXT:    retq
1059;
1060; ATOM-LABEL: test14:
1061; ATOM:       ## %bb.0:
1062; ATOM-NEXT:    xorl %eax, %eax
1063; ATOM-NEXT:    cmpl %esi, %edi
1064; ATOM-NEXT:    adcl $-1, %eax
1065; ATOM-NEXT:    nop
1066; ATOM-NEXT:    nop
1067; ATOM-NEXT:    retq
1068;
1069; ATHLON-LABEL: test14:
1070; ATHLON:       ## %bb.0:
1071; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1072; ATHLON-NEXT:    xorl %eax, %eax
1073; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %ecx
1074; ATHLON-NEXT:    adcl $-1, %eax
1075; ATHLON-NEXT:    retl
1076;
1077; MCU-LABEL: test14:
1078; MCU:       # %bb.0:
1079; MCU-NEXT:    xorl %ecx, %ecx
1080; MCU-NEXT:    cmpl %edx, %eax
1081; MCU-NEXT:    adcl $-1, %ecx
1082; MCU-NEXT:    movl %ecx, %eax
1083; MCU-NEXT:    retl
1084  %c = icmp uge i32 %a, %b
1085  %d = sext i1 %c to i32
1086  ret i32 %d
1087}
1088
1089; rdar://10961709
1090define i32 @test15(i32 %x) nounwind {
1091; GENERIC-LABEL: test15:
1092; GENERIC:       ## %bb.0: ## %entry
1093; GENERIC-NEXT:    xorl %eax, %eax
1094; GENERIC-NEXT:    negl %edi
1095; GENERIC-NEXT:    sbbl %eax, %eax
1096; GENERIC-NEXT:    retq
1097;
1098; ATOM-LABEL: test15:
1099; ATOM:       ## %bb.0: ## %entry
1100; ATOM-NEXT:    xorl %eax, %eax
1101; ATOM-NEXT:    negl %edi
1102; ATOM-NEXT:    sbbl %eax, %eax
1103; ATOM-NEXT:    nop
1104; ATOM-NEXT:    nop
1105; ATOM-NEXT:    retq
1106;
1107; ATHLON-LABEL: test15:
1108; ATHLON:       ## %bb.0: ## %entry
1109; ATHLON-NEXT:    xorl %eax, %eax
1110; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %eax
1111; ATHLON-NEXT:    sbbl %eax, %eax
1112; ATHLON-NEXT:    retl
1113;
1114; MCU-LABEL: test15:
1115; MCU:       # %bb.0: # %entry
1116; MCU-NEXT:    xorl %ecx, %ecx
1117; MCU-NEXT:    negl %eax
1118; MCU-NEXT:    sbbl %ecx, %ecx
1119; MCU-NEXT:    movl %ecx, %eax
1120; MCU-NEXT:    retl
1121entry:
1122  %cmp = icmp ne i32 %x, 0
1123  %sub = sext i1 %cmp to i32
1124  ret i32 %sub
1125}
1126
1127define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
1128; GENERIC-LABEL: test16:
1129; GENERIC:       ## %bb.0: ## %entry
1130; GENERIC-NEXT:    xorl %eax, %eax
1131; GENERIC-NEXT:    negq %rdi
1132; GENERIC-NEXT:    sbbq %rax, %rax
1133; GENERIC-NEXT:    retq
1134;
1135; ATOM-LABEL: test16:
1136; ATOM:       ## %bb.0: ## %entry
1137; ATOM-NEXT:    xorl %eax, %eax
1138; ATOM-NEXT:    negq %rdi
1139; ATOM-NEXT:    sbbq %rax, %rax
1140; ATOM-NEXT:    nop
1141; ATOM-NEXT:    nop
1142; ATOM-NEXT:    retq
1143;
1144; ATHLON-LABEL: test16:
1145; ATHLON:       ## %bb.0: ## %entry
1146; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1147; ATHLON-NEXT:    xorl %eax, %eax
1148; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %ecx
1149; ATHLON-NEXT:    setne %al
1150; ATHLON-NEXT:    negl %eax
1151; ATHLON-NEXT:    movl %eax, %edx
1152; ATHLON-NEXT:    retl
1153;
1154; MCU-LABEL: test16:
1155; MCU:       # %bb.0: # %entry
1156; MCU-NEXT:    movl %eax, %ecx
1157; MCU-NEXT:    xorl %eax, %eax
1158; MCU-NEXT:    orl %edx, %ecx
1159; MCU-NEXT:    setne %al
1160; MCU-NEXT:    negl %eax
1161; MCU-NEXT:    movl %eax, %edx
1162; MCU-NEXT:    retl
1163entry:
1164  %cmp = icmp ne i64 %x, 0
1165  %conv1 = sext i1 %cmp to i64
1166  ret i64 %conv1
1167}
1168
1169define i16 @test17(i16 %x) nounwind {
1170; GENERIC-LABEL: test17:
1171; GENERIC:       ## %bb.0: ## %entry
1172; GENERIC-NEXT:    xorl %eax, %eax
1173; GENERIC-NEXT:    negw %di
1174; GENERIC-NEXT:    sbbl %eax, %eax
1175; GENERIC-NEXT:    ## kill: def $ax killed $ax killed $eax
1176; GENERIC-NEXT:    retq
1177;
1178; ATOM-LABEL: test17:
1179; ATOM:       ## %bb.0: ## %entry
1180; ATOM-NEXT:    xorl %eax, %eax
1181; ATOM-NEXT:    negw %di
1182; ATOM-NEXT:    sbbl %eax, %eax
1183; ATOM-NEXT:    ## kill: def $ax killed $ax killed $eax
1184; ATOM-NEXT:    nop
1185; ATOM-NEXT:    nop
1186; ATOM-NEXT:    retq
1187;
1188; ATHLON-LABEL: test17:
1189; ATHLON:       ## %bb.0: ## %entry
1190; ATHLON-NEXT:    xorl %eax, %eax
1191; ATHLON-NEXT:    cmpw {{[0-9]+}}(%esp), %ax
1192; ATHLON-NEXT:    sbbl %eax, %eax
1193; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1194; ATHLON-NEXT:    retl
1195;
1196; MCU-LABEL: test17:
1197; MCU:       # %bb.0: # %entry
1198; MCU-NEXT:    xorl %ecx, %ecx
1199; MCU-NEXT:    negw %ax
1200; MCU-NEXT:    sbbl %ecx, %ecx
1201; MCU-NEXT:    movl %ecx, %eax
1202; MCU-NEXT:    retl
1203entry:
1204  %cmp = icmp ne i16 %x, 0
1205  %sub = sext i1 %cmp to i16
1206  ret i16 %sub
1207}
1208
1209define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
1210; GENERIC-LABEL: test18:
1211; GENERIC:       ## %bb.0:
1212; GENERIC-NEXT:    movl %esi, %eax
1213; GENERIC-NEXT:    cmpl $15, %edi
1214; GENERIC-NEXT:    cmovgel %edx, %eax
1215; GENERIC-NEXT:    ## kill: def $al killed $al killed $eax
1216; GENERIC-NEXT:    retq
1217;
1218; ATOM-LABEL: test18:
1219; ATOM:       ## %bb.0:
1220; ATOM-NEXT:    movl %esi, %eax
1221; ATOM-NEXT:    cmpl $15, %edi
1222; ATOM-NEXT:    cmovgel %edx, %eax
1223; ATOM-NEXT:    ## kill: def $al killed $al killed $eax
1224; ATOM-NEXT:    nop
1225; ATOM-NEXT:    nop
1226; ATOM-NEXT:    retq
1227;
1228; ATHLON-LABEL: test18:
1229; ATHLON:       ## %bb.0:
1230; ATHLON-NEXT:    cmpl $15, {{[0-9]+}}(%esp)
1231; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
1232; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
1233; ATHLON-NEXT:    cmovll %eax, %ecx
1234; ATHLON-NEXT:    movzbl (%ecx), %eax
1235; ATHLON-NEXT:    retl
1236;
1237; MCU-LABEL: test18:
1238; MCU:       # %bb.0:
1239; MCU-NEXT:    cmpl $15, %eax
1240; MCU-NEXT:    jl .LBB24_2
1241; MCU-NEXT:  # %bb.1:
1242; MCU-NEXT:    movl %ecx, %edx
1243; MCU-NEXT:  .LBB24_2:
1244; MCU-NEXT:    movl %edx, %eax
1245; MCU-NEXT:    retl
1246  %cmp = icmp slt i32 %x, 15
1247  %sel = select i1 %cmp, i8 %a, i8 %b
1248  ret i8 %sel
1249}
1250
1251define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
1252; GENERIC-LABEL: trunc_select_miscompile:
1253; GENERIC:       ## %bb.0:
1254; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1255; GENERIC-NEXT:    movl %edi, %eax
1256; GENERIC-NEXT:    leal 2(%rsi), %ecx
1257; GENERIC-NEXT:    ## kill: def $cl killed $cl killed $ecx
1258; GENERIC-NEXT:    shll %cl, %eax
1259; GENERIC-NEXT:    retq
1260;
1261; ATOM-LABEL: trunc_select_miscompile:
1262; ATOM:       ## %bb.0:
1263; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1264; ATOM-NEXT:    leal 2(%rsi), %ecx
1265; ATOM-NEXT:    movl %edi, %eax
1266; ATOM-NEXT:    ## kill: def $cl killed $cl killed $ecx
1267; ATOM-NEXT:    shll %cl, %eax
1268; ATOM-NEXT:    nop
1269; ATOM-NEXT:    nop
1270; ATOM-NEXT:    retq
1271;
1272; ATHLON-LABEL: trunc_select_miscompile:
1273; ATHLON:       ## %bb.0:
1274; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1275; ATHLON-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
1276; ATHLON-NEXT:    orb $2, %cl
1277; ATHLON-NEXT:    shll %cl, %eax
1278; ATHLON-NEXT:    retl
1279;
1280; MCU-LABEL: trunc_select_miscompile:
1281; MCU:       # %bb.0:
1282; MCU-NEXT:    movl %edx, %ecx
1283; MCU-NEXT:    orb $2, %cl
1284; MCU-NEXT:    # kill: def $cl killed $cl killed $ecx
1285; MCU-NEXT:    shll %cl, %eax
1286; MCU-NEXT:    retl
1287  %tmp1 = select i1 %cc, i32 3, i32 2
1288  %tmp2 = shl i32 %a, %tmp1
1289  ret i32 %tmp2
1290}
1291
1292; reproducer for pr29002
1293define void @clamp_i8(i32 %src, ptr %dst) {
1294; GENERIC-LABEL: clamp_i8:
1295; GENERIC:       ## %bb.0:
1296; GENERIC-NEXT:    cmpl $127, %edi
1297; GENERIC-NEXT:    movl $127, %eax
1298; GENERIC-NEXT:    cmovlel %edi, %eax
1299; GENERIC-NEXT:    cmpl $-128, %eax
1300; GENERIC-NEXT:    movl $128, %ecx
1301; GENERIC-NEXT:    cmovgel %eax, %ecx
1302; GENERIC-NEXT:    movb %cl, (%rsi)
1303; GENERIC-NEXT:    retq
1304;
1305; ATOM-LABEL: clamp_i8:
1306; ATOM:       ## %bb.0:
1307; ATOM-NEXT:    cmpl $127, %edi
1308; ATOM-NEXT:    movl $127, %eax
1309; ATOM-NEXT:    movl $128, %ecx
1310; ATOM-NEXT:    cmovlel %edi, %eax
1311; ATOM-NEXT:    cmpl $-128, %eax
1312; ATOM-NEXT:    cmovgel %eax, %ecx
1313; ATOM-NEXT:    movb %cl, (%rsi)
1314; ATOM-NEXT:    retq
1315;
1316; ATHLON-LABEL: clamp_i8:
1317; ATHLON:       ## %bb.0:
1318; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1319; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1320; ATHLON-NEXT:    cmpl $127, %ecx
1321; ATHLON-NEXT:    movl $127, %edx
1322; ATHLON-NEXT:    cmovlel %ecx, %edx
1323; ATHLON-NEXT:    cmpl $-128, %edx
1324; ATHLON-NEXT:    movl $128, %ecx
1325; ATHLON-NEXT:    cmovgel %edx, %ecx
1326; ATHLON-NEXT:    movb %cl, (%eax)
1327; ATHLON-NEXT:    retl
1328;
1329; MCU-LABEL: clamp_i8:
1330; MCU:       # %bb.0:
1331; MCU-NEXT:    cmpl $127, %eax
1332; MCU-NEXT:    movl $127, %ecx
1333; MCU-NEXT:    jg .LBB26_2
1334; MCU-NEXT:  # %bb.1:
1335; MCU-NEXT:    movl %eax, %ecx
1336; MCU-NEXT:  .LBB26_2:
1337; MCU-NEXT:    cmpl $-128, %ecx
1338; MCU-NEXT:    movb $-128, %al
1339; MCU-NEXT:    jl .LBB26_4
1340; MCU-NEXT:  # %bb.3:
1341; MCU-NEXT:    movl %ecx, %eax
1342; MCU-NEXT:  .LBB26_4:
1343; MCU-NEXT:    movb %al, (%edx)
1344; MCU-NEXT:    retl
1345  %cmp = icmp sgt i32 %src, 127
1346  %sel1 = select i1 %cmp, i32 127, i32 %src
1347  %cmp1 = icmp slt i32 %sel1, -128
1348  %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
1349  %conv = trunc i32 %sel2 to i8
1350  store i8 %conv, ptr %dst, align 2
1351  ret void
1352}
1353
1354; reproducer for pr29002
1355define void @clamp(i32 %src, ptr %dst) {
1356; GENERIC-LABEL: clamp:
1357; GENERIC:       ## %bb.0:
1358; GENERIC-NEXT:    cmpl $32768, %edi ## imm = 0x8000
1359; GENERIC-NEXT:    movl $32767, %eax ## imm = 0x7FFF
1360; GENERIC-NEXT:    cmovll %edi, %eax
1361; GENERIC-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
1362; GENERIC-NEXT:    movl $32768, %ecx ## imm = 0x8000
1363; GENERIC-NEXT:    cmovgel %eax, %ecx
1364; GENERIC-NEXT:    movw %cx, (%rsi)
1365; GENERIC-NEXT:    retq
1366;
1367; ATOM-LABEL: clamp:
1368; ATOM:       ## %bb.0:
1369; ATOM-NEXT:    cmpl $32768, %edi ## imm = 0x8000
1370; ATOM-NEXT:    movl $32767, %eax ## imm = 0x7FFF
1371; ATOM-NEXT:    movl $32768, %ecx ## imm = 0x8000
1372; ATOM-NEXT:    cmovll %edi, %eax
1373; ATOM-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
1374; ATOM-NEXT:    cmovgel %eax, %ecx
1375; ATOM-NEXT:    movw %cx, (%rsi)
1376; ATOM-NEXT:    retq
1377;
1378; ATHLON-LABEL: clamp:
1379; ATHLON:       ## %bb.0:
1380; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1381; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1382; ATHLON-NEXT:    cmpl $32768, %ecx ## imm = 0x8000
1383; ATHLON-NEXT:    movl $32767, %edx ## imm = 0x7FFF
1384; ATHLON-NEXT:    cmovll %ecx, %edx
1385; ATHLON-NEXT:    cmpl $-32768, %edx ## imm = 0x8000
1386; ATHLON-NEXT:    movl $32768, %ecx ## imm = 0x8000
1387; ATHLON-NEXT:    cmovgel %edx, %ecx
1388; ATHLON-NEXT:    movw %cx, (%eax)
1389; ATHLON-NEXT:    retl
1390;
1391; MCU-LABEL: clamp:
1392; MCU:       # %bb.0:
1393; MCU-NEXT:    cmpl $32768, %eax # imm = 0x8000
1394; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
1395; MCU-NEXT:    jge .LBB27_2
1396; MCU-NEXT:  # %bb.1:
1397; MCU-NEXT:    movl %eax, %ecx
1398; MCU-NEXT:  .LBB27_2:
1399; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
1400; MCU-NEXT:    movl $32768, %eax # imm = 0x8000
1401; MCU-NEXT:    jl .LBB27_4
1402; MCU-NEXT:  # %bb.3:
1403; MCU-NEXT:    movl %ecx, %eax
1404; MCU-NEXT:  .LBB27_4:
1405; MCU-NEXT:    movw %ax, (%edx)
1406; MCU-NEXT:    retl
1407  %cmp = icmp sgt i32 %src, 32767
1408  %sel1 = select i1 %cmp, i32 32767, i32 %src
1409  %cmp1 = icmp slt i32 %sel1, -32768
1410  %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
1411  %conv = trunc i32 %sel2 to i16
1412  store i16 %conv, ptr %dst, align 2
1413  ret void
1414}
1415
1416define i16 @select_xor_1(i16 %A, i8 %cond) {
1417; CHECK-LABEL: select_xor_1:
1418; CHECK:       ## %bb.0: ## %entry
1419; CHECK-NEXT:    movl %edi, %eax
1420; CHECK-NEXT:    xorl $43, %eax
1421; CHECK-NEXT:    testb $1, %sil
1422; CHECK-NEXT:    cmovel %edi, %eax
1423; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
1424; CHECK-NEXT:    retq
1425;
1426; ATHLON-LABEL: select_xor_1:
1427; ATHLON:       ## %bb.0: ## %entry
1428; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1429; ATHLON-NEXT:    movl %ecx, %eax
1430; ATHLON-NEXT:    xorl $43, %eax
1431; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1432; ATHLON-NEXT:    cmovel %ecx, %eax
1433; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1434; ATHLON-NEXT:    retl
1435;
1436; MCU-LABEL: select_xor_1:
1437; MCU:       # %bb.0: # %entry
1438; MCU-NEXT:    andl $1, %edx
1439; MCU-NEXT:    negl %edx
1440; MCU-NEXT:    andl $43, %edx
1441; MCU-NEXT:    xorl %edx, %eax
1442; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1443; MCU-NEXT:    retl
1444entry:
1445 %and = and i8 %cond, 1
1446 %cmp10 = icmp eq i8 %and, 0
1447 %0 = xor i16 %A, 43
1448 %1 = select i1 %cmp10, i16 %A, i16 %0
1449 ret i16 %1
1450}
1451
1452; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1453; icmp eq (and %cond, 1), 0
1454define i16 @select_xor_1b(i16 %A, i8 %cond) {
1455; CHECK-LABEL: select_xor_1b:
1456; CHECK:       ## %bb.0: ## %entry
1457; CHECK-NEXT:    movl %edi, %eax
1458; CHECK-NEXT:    xorl $43, %eax
1459; CHECK-NEXT:    testb $1, %sil
1460; CHECK-NEXT:    cmovel %edi, %eax
1461; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
1462; CHECK-NEXT:    retq
1463;
1464; ATHLON-LABEL: select_xor_1b:
1465; ATHLON:       ## %bb.0: ## %entry
1466; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1467; ATHLON-NEXT:    movl %ecx, %eax
1468; ATHLON-NEXT:    xorl $43, %eax
1469; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1470; ATHLON-NEXT:    cmovel %ecx, %eax
1471; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1472; ATHLON-NEXT:    retl
1473;
1474; MCU-LABEL: select_xor_1b:
1475; MCU:       # %bb.0: # %entry
1476; MCU-NEXT:    andl $1, %edx
1477; MCU-NEXT:    negl %edx
1478; MCU-NEXT:    andl $43, %edx
1479; MCU-NEXT:    xorl %edx, %eax
1480; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1481; MCU-NEXT:    retl
1482entry:
1483 %and = and i8 %cond, 1
1484 %cmp10 = icmp ne i8 %and, 1
1485 %0 = xor i16 %A, 43
1486 %1 = select i1 %cmp10, i16 %A, i16 %0
1487 ret i16 %1
1488}
1489
1490define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1491; CHECK-LABEL: select_xor_2:
1492; CHECK:       ## %bb.0: ## %entry
1493; CHECK-NEXT:    movl %esi, %eax
1494; CHECK-NEXT:    xorl %edi, %eax
1495; CHECK-NEXT:    testb $1, %dl
1496; CHECK-NEXT:    cmovel %edi, %eax
1497; CHECK-NEXT:    retq
1498;
1499; ATHLON-LABEL: select_xor_2:
1500; ATHLON:       ## %bb.0: ## %entry
1501; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1502; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1503; ATHLON-NEXT:    xorl %ecx, %eax
1504; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1505; ATHLON-NEXT:    cmovel %ecx, %eax
1506; ATHLON-NEXT:    retl
1507;
1508; MCU-LABEL: select_xor_2:
1509; MCU:       # %bb.0: # %entry
1510; MCU-NEXT:    andl $1, %ecx
1511; MCU-NEXT:    negl %ecx
1512; MCU-NEXT:    andl %edx, %ecx
1513; MCU-NEXT:    xorl %ecx, %eax
1514; MCU-NEXT:    retl
1515entry:
1516 %and = and i8 %cond, 1
1517 %cmp10 = icmp eq i8 %and, 0
1518 %0 = xor i32 %B, %A
1519 %1 = select i1 %cmp10, i32 %A, i32 %0
1520 ret i32 %1
1521}
1522
1523; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1524; icmp eq (and %cond, 1), 0
1525define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) {
1526; CHECK-LABEL: select_xor_2b:
1527; CHECK:       ## %bb.0: ## %entry
1528; CHECK-NEXT:    movl %esi, %eax
1529; CHECK-NEXT:    xorl %edi, %eax
1530; CHECK-NEXT:    testb $1, %dl
1531; CHECK-NEXT:    cmovel %edi, %eax
1532; CHECK-NEXT:    retq
1533;
1534; ATHLON-LABEL: select_xor_2b:
1535; ATHLON:       ## %bb.0: ## %entry
1536; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1537; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1538; ATHLON-NEXT:    xorl %ecx, %eax
1539; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1540; ATHLON-NEXT:    cmovel %ecx, %eax
1541; ATHLON-NEXT:    retl
1542;
1543; MCU-LABEL: select_xor_2b:
1544; MCU:       # %bb.0: # %entry
1545; MCU-NEXT:    andl $1, %ecx
1546; MCU-NEXT:    negl %ecx
1547; MCU-NEXT:    andl %edx, %ecx
1548; MCU-NEXT:    xorl %ecx, %eax
1549; MCU-NEXT:    retl
1550entry:
1551 %and = and i8 %cond, 1
1552 %cmp10 = icmp ne i8 %and, 1
1553 %0 = xor i32 %B, %A
1554 %1 = select i1 %cmp10, i32 %A, i32 %0
1555 ret i32 %1
1556}
1557
1558define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1559; CHECK-LABEL: select_or:
1560; CHECK:       ## %bb.0: ## %entry
1561; CHECK-NEXT:    movl %esi, %eax
1562; CHECK-NEXT:    orl %edi, %eax
1563; CHECK-NEXT:    testb $1, %dl
1564; CHECK-NEXT:    cmovel %edi, %eax
1565; CHECK-NEXT:    retq
1566;
1567; ATHLON-LABEL: select_or:
1568; ATHLON:       ## %bb.0: ## %entry
1569; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1570; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1571; ATHLON-NEXT:    orl %ecx, %eax
1572; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1573; ATHLON-NEXT:    cmovel %ecx, %eax
1574; ATHLON-NEXT:    retl
1575;
1576; MCU-LABEL: select_or:
1577; MCU:       # %bb.0: # %entry
1578; MCU-NEXT:    andl $1, %ecx
1579; MCU-NEXT:    negl %ecx
1580; MCU-NEXT:    andl %edx, %ecx
1581; MCU-NEXT:    orl %ecx, %eax
1582; MCU-NEXT:    retl
1583entry:
1584 %and = and i8 %cond, 1
1585 %cmp10 = icmp eq i8 %and, 0
1586 %0 = or i32 %B, %A
1587 %1 = select i1 %cmp10, i32 %A, i32 %0
1588 ret i32 %1
1589}
1590
1591; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1592; icmp eq (and %cond, 1), 0
1593define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) {
1594; CHECK-LABEL: select_or_b:
1595; CHECK:       ## %bb.0: ## %entry
1596; CHECK-NEXT:    movl %esi, %eax
1597; CHECK-NEXT:    orl %edi, %eax
1598; CHECK-NEXT:    testb $1, %dl
1599; CHECK-NEXT:    cmovel %edi, %eax
1600; CHECK-NEXT:    retq
1601;
1602; ATHLON-LABEL: select_or_b:
1603; ATHLON:       ## %bb.0: ## %entry
1604; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1605; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1606; ATHLON-NEXT:    orl %ecx, %eax
1607; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1608; ATHLON-NEXT:    cmovel %ecx, %eax
1609; ATHLON-NEXT:    retl
1610;
1611; MCU-LABEL: select_or_b:
1612; MCU:       # %bb.0: # %entry
1613; MCU-NEXT:    andl $1, %ecx
1614; MCU-NEXT:    negl %ecx
1615; MCU-NEXT:    andl %edx, %ecx
1616; MCU-NEXT:    orl %ecx, %eax
1617; MCU-NEXT:    retl
1618entry:
1619 %and = and i8 %cond, 1
1620 %cmp10 = icmp ne i8 %and, 1
1621 %0 = or i32 %B, %A
1622 %1 = select i1 %cmp10, i32 %A, i32 %0
1623 ret i32 %1
1624}
1625
1626define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1627; CHECK-LABEL: select_or_1:
1628; CHECK:       ## %bb.0: ## %entry
1629; CHECK-NEXT:    movl %esi, %eax
1630; CHECK-NEXT:    orl %edi, %eax
1631; CHECK-NEXT:    testb $1, %dl
1632; CHECK-NEXT:    cmovel %edi, %eax
1633; CHECK-NEXT:    retq
1634;
1635; ATHLON-LABEL: select_or_1:
1636; ATHLON:       ## %bb.0: ## %entry
1637; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1638; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1639; ATHLON-NEXT:    orl %ecx, %eax
1640; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1641; ATHLON-NEXT:    cmovel %ecx, %eax
1642; ATHLON-NEXT:    retl
1643;
1644; MCU-LABEL: select_or_1:
1645; MCU:       # %bb.0: # %entry
1646; MCU-NEXT:    andl $1, %ecx
1647; MCU-NEXT:    negl %ecx
1648; MCU-NEXT:    andl %edx, %ecx
1649; MCU-NEXT:    orl %ecx, %eax
1650; MCU-NEXT:    retl
1651entry:
1652 %and = and i32 %cond, 1
1653 %cmp10 = icmp eq i32 %and, 0
1654 %0 = or i32 %B, %A
1655 %1 = select i1 %cmp10, i32 %A, i32 %0
1656 ret i32 %1
1657}
1658
1659; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1660; icmp eq (and %cond, 1), 0
1661define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) {
1662; CHECK-LABEL: select_or_1b:
1663; CHECK:       ## %bb.0: ## %entry
1664; CHECK-NEXT:    movl %esi, %eax
1665; CHECK-NEXT:    orl %edi, %eax
1666; CHECK-NEXT:    testb $1, %dl
1667; CHECK-NEXT:    cmovel %edi, %eax
1668; CHECK-NEXT:    retq
1669;
1670; ATHLON-LABEL: select_or_1b:
1671; ATHLON:       ## %bb.0: ## %entry
1672; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1673; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1674; ATHLON-NEXT:    orl %ecx, %eax
1675; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1676; ATHLON-NEXT:    cmovel %ecx, %eax
1677; ATHLON-NEXT:    retl
1678;
1679; MCU-LABEL: select_or_1b:
1680; MCU:       # %bb.0: # %entry
1681; MCU-NEXT:    andl $1, %ecx
1682; MCU-NEXT:    negl %ecx
1683; MCU-NEXT:    andl %edx, %ecx
1684; MCU-NEXT:    orl %ecx, %eax
1685; MCU-NEXT:    retl
1686entry:
1687 %and = and i32 %cond, 1
1688 %cmp10 = icmp ne i32 %and, 1
1689 %0 = or i32 %B, %A
1690 %1 = select i1 %cmp10, i32 %A, i32 %0
1691 ret i32 %1
1692}
1693
1694define i32 @select_add(i32 %A, i32 %B, i8 %cond) {
1695; GENERIC-LABEL: select_add:
1696; GENERIC:       ## %bb.0: ## %entry
1697; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1698; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
1699; GENERIC-NEXT:    leal (%rsi,%rdi), %eax
1700; GENERIC-NEXT:    testb $1, %dl
1701; GENERIC-NEXT:    cmovel %edi, %eax
1702; GENERIC-NEXT:    retq
1703;
1704; ATOM-LABEL: select_add:
1705; ATOM:       ## %bb.0: ## %entry
1706; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1707; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
1708; ATOM-NEXT:    leal (%rsi,%rdi), %eax
1709; ATOM-NEXT:    testb $1, %dl
1710; ATOM-NEXT:    cmovel %edi, %eax
1711; ATOM-NEXT:    nop
1712; ATOM-NEXT:    nop
1713; ATOM-NEXT:    retq
1714;
1715; ATHLON-LABEL: select_add:
1716; ATHLON:       ## %bb.0: ## %entry
1717; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1718; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1719; ATHLON-NEXT:    addl %ecx, %eax
1720; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1721; ATHLON-NEXT:    cmovel %ecx, %eax
1722; ATHLON-NEXT:    retl
1723;
1724; MCU-LABEL: select_add:
1725; MCU:       # %bb.0: # %entry
1726; MCU-NEXT:    andl $1, %ecx
1727; MCU-NEXT:    negl %ecx
1728; MCU-NEXT:    andl %edx, %ecx
1729; MCU-NEXT:    addl %ecx, %eax
1730; MCU-NEXT:    retl
1731entry:
1732 %and = and i8 %cond, 1
1733 %cmp10 = icmp eq i8 %and, 0
1734 %0 = add i32 %B, %A
1735 %1 = select i1 %cmp10, i32 %A, i32 %0
1736 ret i32 %1
1737}
1738
1739; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1740; icmp eq (and %cond, 1), 0
1741define i32 @select_add_b(i32 %A, i32 %B, i8 %cond) {
1742; GENERIC-LABEL: select_add_b:
1743; GENERIC:       ## %bb.0: ## %entry
1744; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1745; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
1746; GENERIC-NEXT:    leal (%rsi,%rdi), %eax
1747; GENERIC-NEXT:    testb $1, %dl
1748; GENERIC-NEXT:    cmovel %edi, %eax
1749; GENERIC-NEXT:    retq
1750;
1751; ATOM-LABEL: select_add_b:
1752; ATOM:       ## %bb.0: ## %entry
1753; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1754; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
1755; ATOM-NEXT:    leal (%rsi,%rdi), %eax
1756; ATOM-NEXT:    testb $1, %dl
1757; ATOM-NEXT:    cmovel %edi, %eax
1758; ATOM-NEXT:    nop
1759; ATOM-NEXT:    nop
1760; ATOM-NEXT:    retq
1761;
1762; ATHLON-LABEL: select_add_b:
1763; ATHLON:       ## %bb.0: ## %entry
1764; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1765; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1766; ATHLON-NEXT:    addl %ecx, %eax
1767; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1768; ATHLON-NEXT:    cmovel %ecx, %eax
1769; ATHLON-NEXT:    retl
1770;
1771; MCU-LABEL: select_add_b:
1772; MCU:       # %bb.0: # %entry
1773; MCU-NEXT:    andl $1, %ecx
1774; MCU-NEXT:    negl %ecx
1775; MCU-NEXT:    andl %edx, %ecx
1776; MCU-NEXT:    addl %ecx, %eax
1777; MCU-NEXT:    retl
1778entry:
1779 %and = and i8 %cond, 1
1780 %cmp10 = icmp ne i8 %and, 1
1781 %0 = add i32 %B, %A
1782 %1 = select i1 %cmp10, i32 %A, i32 %0
1783 ret i32 %1
1784}
1785
1786define i32 @select_add_1(i32 %A, i32 %B, i32 %cond) {
1787; GENERIC-LABEL: select_add_1:
1788; GENERIC:       ## %bb.0: ## %entry
1789; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1790; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
1791; GENERIC-NEXT:    leal (%rsi,%rdi), %eax
1792; GENERIC-NEXT:    testb $1, %dl
1793; GENERIC-NEXT:    cmovel %edi, %eax
1794; GENERIC-NEXT:    retq
1795;
1796; ATOM-LABEL: select_add_1:
1797; ATOM:       ## %bb.0: ## %entry
1798; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1799; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
1800; ATOM-NEXT:    leal (%rsi,%rdi), %eax
1801; ATOM-NEXT:    testb $1, %dl
1802; ATOM-NEXT:    cmovel %edi, %eax
1803; ATOM-NEXT:    nop
1804; ATOM-NEXT:    nop
1805; ATOM-NEXT:    retq
1806;
1807; ATHLON-LABEL: select_add_1:
1808; ATHLON:       ## %bb.0: ## %entry
1809; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1810; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1811; ATHLON-NEXT:    addl %ecx, %eax
1812; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1813; ATHLON-NEXT:    cmovel %ecx, %eax
1814; ATHLON-NEXT:    retl
1815;
1816; MCU-LABEL: select_add_1:
1817; MCU:       # %bb.0: # %entry
1818; MCU-NEXT:    andl $1, %ecx
1819; MCU-NEXT:    negl %ecx
1820; MCU-NEXT:    andl %edx, %ecx
1821; MCU-NEXT:    addl %ecx, %eax
1822; MCU-NEXT:    retl
1823entry:
1824 %and = and i32 %cond, 1
1825 %cmp10 = icmp eq i32 %and, 0
1826 %0 = add i32 %B, %A
1827 %1 = select i1 %cmp10, i32 %A, i32 %0
1828 ret i32 %1
1829}
1830
1831; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1832; icmp eq (and %cond, 1), 0
1833define i32 @select_add_1b(i32 %A, i32 %B, i32 %cond) {
1834; GENERIC-LABEL: select_add_1b:
1835; GENERIC:       ## %bb.0: ## %entry
1836; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1837; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
1838; GENERIC-NEXT:    leal (%rsi,%rdi), %eax
1839; GENERIC-NEXT:    testb $1, %dl
1840; GENERIC-NEXT:    cmovel %edi, %eax
1841; GENERIC-NEXT:    retq
1842;
1843; ATOM-LABEL: select_add_1b:
1844; ATOM:       ## %bb.0: ## %entry
1845; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1846; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
1847; ATOM-NEXT:    leal (%rsi,%rdi), %eax
1848; ATOM-NEXT:    testb $1, %dl
1849; ATOM-NEXT:    cmovel %edi, %eax
1850; ATOM-NEXT:    nop
1851; ATOM-NEXT:    nop
1852; ATOM-NEXT:    retq
1853;
1854; ATHLON-LABEL: select_add_1b:
1855; ATHLON:       ## %bb.0: ## %entry
1856; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1857; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1858; ATHLON-NEXT:    addl %ecx, %eax
1859; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1860; ATHLON-NEXT:    cmovel %ecx, %eax
1861; ATHLON-NEXT:    retl
1862;
1863; MCU-LABEL: select_add_1b:
1864; MCU:       # %bb.0: # %entry
1865; MCU-NEXT:    andl $1, %ecx
1866; MCU-NEXT:    negl %ecx
1867; MCU-NEXT:    andl %edx, %ecx
1868; MCU-NEXT:    addl %ecx, %eax
1869; MCU-NEXT:    retl
1870entry:
1871 %and = and i32 %cond, 1
1872 %cmp10 = icmp ne i32 %and, 1
1873 %0 = add i32 %B, %A
1874 %1 = select i1 %cmp10, i32 %A, i32 %0
1875 ret i32 %1
1876}
1877
1878define i32 @select_sub(i32 %A, i32 %B, i8 %cond) {
1879; CHECK-LABEL: select_sub:
1880; CHECK:       ## %bb.0: ## %entry
1881; CHECK-NEXT:    movl %esi, %eax
1882; CHECK-NEXT:    subl %edi, %eax
1883; CHECK-NEXT:    testb $1, %dl
1884; CHECK-NEXT:    cmovel %esi, %eax
1885; CHECK-NEXT:    retq
1886;
1887; ATHLON-LABEL: select_sub:
1888; ATHLON:       ## %bb.0: ## %entry
1889; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1890; ATHLON-NEXT:    movl %ecx, %eax
1891; ATHLON-NEXT:    subl {{[0-9]+}}(%esp), %eax
1892; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1893; ATHLON-NEXT:    cmovel %ecx, %eax
1894; ATHLON-NEXT:    retl
1895;
1896; MCU-LABEL: select_sub:
1897; MCU:       # %bb.0: # %entry
1898; MCU-NEXT:    andl $1, %ecx
1899; MCU-NEXT:    negl %ecx
1900; MCU-NEXT:    andl %eax, %ecx
1901; MCU-NEXT:    subl %ecx, %edx
1902; MCU-NEXT:    movl %edx, %eax
1903; MCU-NEXT:    retl
1904entry:
1905 %and = and i8 %cond, 1
1906 %cmp10 = icmp eq i8 %and, 0
1907 %0 = sub i32 %B, %A
1908 %1 = select i1 %cmp10, i32 %B, i32 %0
1909 ret i32 %1
1910}
1911
1912; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1913; icmp eq (and %cond, 1), 0
1914define i32 @select_sub_b(i32 %A, i32 %B, i8 %cond) {
1915; CHECK-LABEL: select_sub_b:
1916; CHECK:       ## %bb.0: ## %entry
1917; CHECK-NEXT:    movl %esi, %eax
1918; CHECK-NEXT:    subl %edi, %eax
1919; CHECK-NEXT:    testb $1, %dl
1920; CHECK-NEXT:    cmovel %esi, %eax
1921; CHECK-NEXT:    retq
1922;
1923; ATHLON-LABEL: select_sub_b:
1924; ATHLON:       ## %bb.0: ## %entry
1925; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1926; ATHLON-NEXT:    movl %ecx, %eax
1927; ATHLON-NEXT:    subl {{[0-9]+}}(%esp), %eax
1928; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1929; ATHLON-NEXT:    cmovel %ecx, %eax
1930; ATHLON-NEXT:    retl
1931;
1932; MCU-LABEL: select_sub_b:
1933; MCU:       # %bb.0: # %entry
1934; MCU-NEXT:    andl $1, %ecx
1935; MCU-NEXT:    negl %ecx
1936; MCU-NEXT:    andl %eax, %ecx
1937; MCU-NEXT:    subl %ecx, %edx
1938; MCU-NEXT:    movl %edx, %eax
1939; MCU-NEXT:    retl
1940entry:
1941 %and = and i8 %cond, 1
1942 %cmp10 = icmp ne i8 %and, 1
1943 %0 = sub i32 %B, %A
1944 %1 = select i1 %cmp10, i32 %B, i32 %0
1945 ret i32 %1
1946}
1947
1948define i32 @select_sub_1(i32 %A, i32 %B, i32 %cond) {
1949; CHECK-LABEL: select_sub_1:
1950; CHECK:       ## %bb.0: ## %entry
1951; CHECK-NEXT:    movl %esi, %eax
1952; CHECK-NEXT:    subl %edi, %eax
1953; CHECK-NEXT:    testb $1, %dl
1954; CHECK-NEXT:    cmovel %esi, %eax
1955; CHECK-NEXT:    retq
1956;
1957; ATHLON-LABEL: select_sub_1:
1958; ATHLON:       ## %bb.0: ## %entry
1959; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1960; ATHLON-NEXT:    movl %ecx, %eax
1961; ATHLON-NEXT:    subl {{[0-9]+}}(%esp), %eax
1962; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1963; ATHLON-NEXT:    cmovel %ecx, %eax
1964; ATHLON-NEXT:    retl
1965;
1966; MCU-LABEL: select_sub_1:
1967; MCU:       # %bb.0: # %entry
1968; MCU-NEXT:    andl $1, %ecx
1969; MCU-NEXT:    negl %ecx
1970; MCU-NEXT:    andl %eax, %ecx
1971; MCU-NEXT:    subl %ecx, %edx
1972; MCU-NEXT:    movl %edx, %eax
1973; MCU-NEXT:    retl
1974entry:
1975 %and = and i32 %cond, 1
1976 %cmp10 = icmp eq i32 %and, 0
1977 %0 = sub i32 %B, %A
1978 %1 = select i1 %cmp10, i32 %B, i32 %0
1979 ret i32 %1
1980}
1981
1982; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1983; icmp eq (and %cond, 1), 0
1984define i32 @select_sub_1b(i32 %A, i32 %B, i32 %cond) {
1985; CHECK-LABEL: select_sub_1b:
1986; CHECK:       ## %bb.0: ## %entry
1987; CHECK-NEXT:    movl %esi, %eax
1988; CHECK-NEXT:    subl %edi, %eax
1989; CHECK-NEXT:    testb $1, %dl
1990; CHECK-NEXT:    cmovel %esi, %eax
1991; CHECK-NEXT:    retq
1992;
1993; ATHLON-LABEL: select_sub_1b:
1994; ATHLON:       ## %bb.0: ## %entry
1995; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1996; ATHLON-NEXT:    movl %ecx, %eax
1997; ATHLON-NEXT:    subl {{[0-9]+}}(%esp), %eax
1998; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1999; ATHLON-NEXT:    cmovel %ecx, %eax
2000; ATHLON-NEXT:    retl
2001;
2002; MCU-LABEL: select_sub_1b:
2003; MCU:       # %bb.0: # %entry
2004; MCU-NEXT:    andl $1, %ecx
2005; MCU-NEXT:    negl %ecx
2006; MCU-NEXT:    andl %eax, %ecx
2007; MCU-NEXT:    subl %ecx, %edx
2008; MCU-NEXT:    movl %edx, %eax
2009; MCU-NEXT:    retl
2010entry:
2011 %and = and i32 %cond, 1
2012 %cmp10 = icmp ne i32 %and, 1
2013 %0 = sub i32 %B, %A
2014 %1 = select i1 %cmp10, i32 %B, i32 %0
2015 ret i32 %1
2016}
2017
2018; Negative case - incorrect subtract operand
2019define i32 @select_sub_neg(i32 %A, i32 %B, i8 %cond) {
2020; CHECK-LABEL: select_sub_neg:
2021; CHECK:       ## %bb.0: ## %entry
2022; CHECK-NEXT:    movl %esi, %eax
2023; CHECK-NEXT:    subl %edi, %eax
2024; CHECK-NEXT:    testb $1, %dl
2025; CHECK-NEXT:    cmovel %edi, %eax
2026; CHECK-NEXT:    retq
2027;
2028; ATHLON-LABEL: select_sub_neg:
2029; ATHLON:       ## %bb.0: ## %entry
2030; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
2031; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
2032; ATHLON-NEXT:    subl %ecx, %eax
2033; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
2034; ATHLON-NEXT:    cmovel %ecx, %eax
2035; ATHLON-NEXT:    retl
2036;
2037; MCU-LABEL: select_sub_neg:
2038; MCU:       # %bb.0: # %entry
2039; MCU-NEXT:    testb $1, %cl
2040; MCU-NEXT:    je .LBB44_2
2041; MCU-NEXT:  # %bb.1: # %entry
2042; MCU-NEXT:    subl %eax, %edx
2043; MCU-NEXT:    movl %edx, %eax
2044; MCU-NEXT:  .LBB44_2: # %entry
2045; MCU-NEXT:    retl
2046entry:
2047 %and = and i8 %cond, 1
2048 %cmp10 = icmp eq i8 %and, 0
2049 %0 = sub i32 %B, %A
2050 %1 = select i1 %cmp10, i32 %A, i32 %0
2051 ret i32 %1
2052}
2053
2054define i64 @PR51612(i64 %x, i64 %y) {
2055; CHECK-LABEL: PR51612:
2056; CHECK:       ## %bb.0:
2057; CHECK-NEXT:    leal 1(%rsi), %eax
2058; CHECK-NEXT:    incq %rdi
2059; CHECK-NEXT:    cmovnel %edi, %eax
2060; CHECK-NEXT:    andl 10, %eax
2061; CHECK-NEXT:    retq
2062;
2063; ATHLON-LABEL: PR51612:
2064; ATHLON:       ## %bb.0:
2065; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
2066; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
2067; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
2068; ATHLON-NEXT:    incl %edx
2069; ATHLON-NEXT:    addl $1, %eax
2070; ATHLON-NEXT:    adcl $0, %ecx
2071; ATHLON-NEXT:    cmovbl %edx, %eax
2072; ATHLON-NEXT:    andl 10, %eax
2073; ATHLON-NEXT:    xorl %edx, %edx
2074; ATHLON-NEXT:    retl
2075;
2076; MCU-LABEL: PR51612:
2077; MCU:       # %bb.0:
2078; MCU-NEXT:    addl $1, %eax
2079; MCU-NEXT:    adcl $0, %edx
2080; MCU-NEXT:    jae .LBB45_2
2081; MCU-NEXT:  # %bb.1:
2082; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
2083; MCU-NEXT:    incl %eax
2084; MCU-NEXT:  .LBB45_2:
2085; MCU-NEXT:    andl 10, %eax
2086; MCU-NEXT:    xorl %edx, %edx
2087; MCU-NEXT:    retl
2088  %add = add i64 %x, 1
2089  %inc = add i64 %y, 1
2090  %tobool = icmp eq i64 %add, 0
2091  %sel = select i1 %tobool, i64 %inc, i64 %add
2092  %i = load i32, ptr inttoptr (i32 10 to ptr), align 4
2093  %conv = zext i32 %i to i64
2094  %and = and i64 %sel, %conv
2095  ret i64 %and
2096}
2097
2098; The next 2 tests are for additional bugs based on PR51612.
2099
2100declare { i8, i1 } @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone
2101declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
2102
2103define i8 @select_uaddo_common_op0(i8 %a, i8 %b, i8 %c, i1 %cond) {
2104; GENERIC-LABEL: select_uaddo_common_op0:
2105; GENERIC:       ## %bb.0:
2106; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
2107; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
2108; GENERIC-NEXT:    testb $1, %cl
2109; GENERIC-NEXT:    cmovel %edx, %esi
2110; GENERIC-NEXT:    leal (%rsi,%rdi), %eax
2111; GENERIC-NEXT:    ## kill: def $al killed $al killed $eax
2112; GENERIC-NEXT:    retq
2113;
2114; ATOM-LABEL: select_uaddo_common_op0:
2115; ATOM:       ## %bb.0:
2116; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
2117; ATOM-NEXT:    testb $1, %cl
2118; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
2119; ATOM-NEXT:    cmovel %edx, %esi
2120; ATOM-NEXT:    leal (%rsi,%rdi), %eax
2121; ATOM-NEXT:    ## kill: def $al killed $al killed $eax
2122; ATOM-NEXT:    nop
2123; ATOM-NEXT:    nop
2124; ATOM-NEXT:    retq
2125;
2126; ATHLON-LABEL: select_uaddo_common_op0:
2127; ATHLON:       ## %bb.0:
2128; ATHLON-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
2129; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
2130; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
2131; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
2132; ATHLON-NEXT:    cmovnel %ecx, %edx
2133; ATHLON-NEXT:    addb (%edx), %al
2134; ATHLON-NEXT:    retl
2135;
2136; MCU-LABEL: select_uaddo_common_op0:
2137; MCU:       # %bb.0:
2138; MCU-NEXT:    testb $1, {{[0-9]+}}(%esp)
2139; MCU-NEXT:    jne .LBB46_2
2140; MCU-NEXT:  # %bb.1:
2141; MCU-NEXT:    movl %ecx, %edx
2142; MCU-NEXT:  .LBB46_2:
2143; MCU-NEXT:    addb %dl, %al
2144; MCU-NEXT:    # kill: def $al killed $al killed $eax
2145; MCU-NEXT:    retl
2146  %ab = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %b)
2147  %ac = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %c)
2148  %ab0 = extractvalue { i8, i1 } %ab, 0
2149  %ac0 = extractvalue { i8, i1 } %ac, 0
2150  %sel = select i1 %cond, i8 %ab0, i8 %ac0
2151  ret i8 %sel
2152}
2153
2154define i32 @select_uaddo_common_op1(i32 %a, i32 %b, i32 %c, i1 %cond) {
2155; GENERIC-LABEL: select_uaddo_common_op1:
2156; GENERIC:       ## %bb.0:
2157; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
2158; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
2159; GENERIC-NEXT:    testb $1, %cl
2160; GENERIC-NEXT:    cmovel %edx, %edi
2161; GENERIC-NEXT:    leal (%rdi,%rsi), %eax
2162; GENERIC-NEXT:    retq
2163;
2164; ATOM-LABEL: select_uaddo_common_op1:
2165; ATOM:       ## %bb.0:
2166; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
2167; ATOM-NEXT:    testb $1, %cl
2168; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
2169; ATOM-NEXT:    cmovel %edx, %edi
2170; ATOM-NEXT:    leal (%rdi,%rsi), %eax
2171; ATOM-NEXT:    nop
2172; ATOM-NEXT:    nop
2173; ATOM-NEXT:    retq
2174;
2175; ATHLON-LABEL: select_uaddo_common_op1:
2176; ATHLON:       ## %bb.0:
2177; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
2178; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
2179; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
2180; ATHLON-NEXT:    cmovnel %eax, %ecx
2181; ATHLON-NEXT:    movl (%ecx), %eax
2182; ATHLON-NEXT:    addl {{[0-9]+}}(%esp), %eax
2183; ATHLON-NEXT:    retl
2184;
2185; MCU-LABEL: select_uaddo_common_op1:
2186; MCU:       # %bb.0:
2187; MCU-NEXT:    testb $1, {{[0-9]+}}(%esp)
2188; MCU-NEXT:    jne .LBB47_2
2189; MCU-NEXT:  # %bb.1:
2190; MCU-NEXT:    movl %ecx, %eax
2191; MCU-NEXT:  .LBB47_2:
2192; MCU-NEXT:    addl %edx, %eax
2193; MCU-NEXT:    retl
2194  %ab = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
2195  %cb = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %c, i32 %b)
2196  %ab0 = extractvalue { i32, i1 } %ab, 0
2197  %cb0 = extractvalue { i32, i1 } %cb, 0
2198  %sel = select i1 %cond, i32 %ab0, i32 %cb0
2199  ret i32 %sel
2200}
2201