xref: /llvm-project/llvm/test/CodeGen/X86/select-phi-s16-fp.ll (revision 0605e984fab700a6ef4affc3fdb66aaba3417baa)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -global-isel=0 -mcpu=generic -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
3
4; For all these tests we disable optimizations through function attributes
5; because the code we are exercising here needs phis and we want to keep the
6; IR small.
7
8; This code used to crash in SDISel because bf16 was promoted to f32 through
9; a `f32 = vector_extract_elt <1 x bf16>, i32 0`, which is illegal.
10; The invalid SDNode and thus, the crash was only exposed by the constant
11; folding.
12define void @phi_vec1bf16_to_f32_with_const_folding(ptr %dst) #0 {
13; CHECK-LABEL: phi_vec1bf16_to_f32_with_const_folding:
14; CHECK:       ## %bb.0: ## %entry
15; CHECK-NEXT:    pushq %rbx
16; CHECK-NEXT:    .cfi_def_cfa_offset 16
17; CHECK-NEXT:    .cfi_offset %rbx, -16
18; CHECK-NEXT:    movq %rdi, %rbx
19; CHECK-NEXT:    jmp LBB0_1
20; CHECK-NEXT:  LBB0_1: ## %bb
21; CHECK-NEXT:    xorps %xmm0, %xmm0
22; CHECK-NEXT:    callq ___truncsfbf2
23; CHECK-NEXT:    pextrw $0, %xmm0, %eax
24; CHECK-NEXT:    movw %ax, 2(%rbx)
25; CHECK-NEXT:    popq %rbx
26; CHECK-NEXT:    retq
27entry:
28  br label %bb
29
30bb:
31  %phi = phi <1 x bfloat> [ zeroinitializer, %entry ]
32  %res = shufflevector <1 x bfloat> poison, <1 x bfloat> %phi, <2 x i32> <i32 0, i32 1>
33  store <2 x bfloat> %res, ptr %dst
34  ret void
35}
36; Same as phi_vec1bf16_to_f32_with_const_folding but without the constant
37; folding.
38; This test exercises the same invalid SDNode, but it happened to work by
39; accident before. Here we make sure the fix also work as expected in the
40; non-constant folding case.
41define void @phi_vec1bf16_to_f32(ptr %src, ptr %dst) #0 {
42; CHECK-LABEL: phi_vec1bf16_to_f32:
43; CHECK:       ## %bb.0: ## %entry
44; CHECK-NEXT:    pushq %rbx
45; CHECK-NEXT:    .cfi_def_cfa_offset 16
46; CHECK-NEXT:    .cfi_offset %rbx, -16
47; CHECK-NEXT:    movq %rsi, %rbx
48; CHECK-NEXT:    movzwl (%rdi), %eax
49; CHECK-NEXT:    shll $16, %eax
50; CHECK-NEXT:    movd %eax, %xmm0
51; CHECK-NEXT:    jmp LBB1_1
52; CHECK-NEXT:  LBB1_1: ## %bb
53; CHECK-NEXT:    callq ___truncsfbf2
54; CHECK-NEXT:    pextrw $0, %xmm0, %eax
55; CHECK-NEXT:    movw %ax, 2(%rbx)
56; CHECK-NEXT:    popq %rbx
57; CHECK-NEXT:    retq
58entry:
59  %input = load <1 x bfloat>, ptr %src
60  br label %bb
61
62bb:
63  %phi = phi <1 x bfloat> [ %input, %entry ]
64  %res = shufflevector <1 x bfloat> poison, <1 x bfloat> %phi, <2 x i32> <i32 0, i32 1>
65  store <2 x bfloat> %res, ptr %dst
66  ret void
67}
68
69
70; Half type is legal on x86 so nothing special here, but it
71; doesn't hurt to be thorough.
72define void @phi_vec1half_with_const_folding(ptr %dst) #0 {
73; CHECK-LABEL: phi_vec1half_with_const_folding:
74; CHECK:       ## %bb.0: ## %entry
75; CHECK-NEXT:    xorps %xmm0, %xmm0
76; CHECK-NEXT:    jmp LBB2_1
77; CHECK-NEXT:  LBB2_1: ## %bb
78; CHECK-NEXT:    pextrw $0, %xmm0, %eax
79; CHECK-NEXT:    movw %ax, 2(%rdi)
80; CHECK-NEXT:    retq
81entry:
82  br label %bb
83
84bb:
85  %phi = phi <1 x half> [ zeroinitializer, %entry ]
86  %res = shufflevector <1 x half> poison, <1 x half> %phi, <2 x i32> <i32 0, i32 1>
87  store <2 x half> %res, ptr %dst
88  ret void
89}
90
91; Half type is legal on x86 so nothing special here, but it
92; doesn't hurt to be thorough.
93; Same as phi_vec1half_with_constant_folding but without the constant folding.
94define void @phi_vec1half(ptr %src, ptr %dst) #0 {
95; CHECK-LABEL: phi_vec1half:
96; CHECK:       ## %bb.0: ## %entry
97; CHECK-NEXT:    pinsrw $0, (%rdi), %xmm0
98; CHECK-NEXT:    jmp LBB3_1
99; CHECK-NEXT:  LBB3_1: ## %bb
100; CHECK-NEXT:    pextrw $0, %xmm0, %eax
101; CHECK-NEXT:    movw %ax, 2(%rsi)
102; CHECK-NEXT:    retq
103entry:
104  %input = load <1 x half>, ptr %src
105  br label %bb
106
107bb:
108  %phi = phi <1 x half> [ %input, %entry ]
109  %res = shufflevector <1 x half> poison, <1 x half> %phi, <2 x i32> <i32 0, i32 1>
110  store <2 x half> %res, ptr %dst
111  ret void
112}
113
114attributes #0 = { noinline optnone }
115