1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK32 --check-prefix=X86 3; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK32 --check-prefix=SHLD 4; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK32 --check-prefix=BMI2 5; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK64 --check-prefix=X64 6; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK64 --check-prefix=SHLD64 7; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK64 --check-prefix=BMI264 8 9define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone { 10; CHECK32-LABEL: foo: 11; CHECK32: # %bb.0: # %entry 12; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 13; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 14; CHECK32-NEXT: roll %cl, %eax 15; CHECK32-NEXT: retl 16; 17; CHECK64-LABEL: foo: 18; CHECK64: # %bb.0: # %entry 19; CHECK64-NEXT: movl %edx, %ecx 20; CHECK64-NEXT: movl %edi, %eax 21; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx 22; CHECK64-NEXT: roll %cl, %eax 23; CHECK64-NEXT: retq 24entry: 25 %0 = shl i32 %x, %z 26 %1 = sub i32 32, %z 27 %2 = lshr i32 %x, %1 28 %3 = or i32 %2, %0 29 ret i32 %3 30} 31 32define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone { 33; CHECK32-LABEL: bar: 34; CHECK32: # %bb.0: # %entry 35; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 36; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx 37; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 38; CHECK32-NEXT: shldl %cl, %edx, %eax 39; CHECK32-NEXT: retl 40; 41; CHECK64-LABEL: bar: 42; CHECK64: # %bb.0: # %entry 43; CHECK64-NEXT: movl %edx, %ecx 44; CHECK64-NEXT: movl %esi, %eax 45; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx 46; CHECK64-NEXT: shldl %cl, %edi, %eax 47; CHECK64-NEXT: retq 48entry: 49 %0 = shl i32 %y, %z 50 %1 = sub i32 32, %z 51 %2 = lshr i32 %x, %1 52 %3 = or i32 %2, %0 53 ret i32 %3 54} 55 56define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone { 57; CHECK32-LABEL: un: 58; CHECK32: # %bb.0: # %entry 59; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 60; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 61; CHECK32-NEXT: rorl %cl, %eax 62; CHECK32-NEXT: retl 63; 64; CHECK64-LABEL: un: 65; CHECK64: # %bb.0: # %entry 66; CHECK64-NEXT: movl %edx, %ecx 67; CHECK64-NEXT: movl %edi, %eax 68; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx 69; CHECK64-NEXT: rorl %cl, %eax 70; CHECK64-NEXT: retq 71entry: 72 %0 = lshr i32 %x, %z 73 %1 = sub i32 32, %z 74 %2 = shl i32 %x, %1 75 %3 = or i32 %2, %0 76 ret i32 %3 77} 78 79define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone { 80; CHECK32-LABEL: bu: 81; CHECK32: # %bb.0: # %entry 82; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 83; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx 84; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 85; CHECK32-NEXT: shrdl %cl, %edx, %eax 86; CHECK32-NEXT: retl 87; 88; CHECK64-LABEL: bu: 89; CHECK64: # %bb.0: # %entry 90; CHECK64-NEXT: movl %edx, %ecx 91; CHECK64-NEXT: movl %esi, %eax 92; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx 93; CHECK64-NEXT: shrdl %cl, %edi, %eax 94; CHECK64-NEXT: retq 95entry: 96 %0 = lshr i32 %y, %z 97 %1 = sub i32 32, %z 98 %2 = shl i32 %x, %1 99 %3 = or i32 %2, %0 100 ret i32 %3 101} 102 103define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone { 104; X86-LABEL: xfoo: 105; X86: # %bb.0: # %entry 106; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 107; X86-NEXT: roll $7, %eax 108; X86-NEXT: retl 109; 110; SHLD-LABEL: xfoo: 111; SHLD: # %bb.0: # %entry 112; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 113; SHLD-NEXT: shldl $7, %eax, %eax 114; SHLD-NEXT: retl 115; 116; BMI2-LABEL: xfoo: 117; BMI2: # %bb.0: # %entry 118; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax 119; BMI2-NEXT: retl 120; 121; X64-LABEL: xfoo: 122; X64: # %bb.0: # %entry 123; X64-NEXT: movl %edi, %eax 124; X64-NEXT: roll $7, %eax 125; X64-NEXT: retq 126; 127; SHLD64-LABEL: xfoo: 128; SHLD64: # %bb.0: # %entry 129; SHLD64-NEXT: movl %edi, %eax 130; SHLD64-NEXT: shldl $7, %eax, %eax 131; SHLD64-NEXT: retq 132; 133; BMI264-LABEL: xfoo: 134; BMI264: # %bb.0: # %entry 135; BMI264-NEXT: rorxl $25, %edi, %eax 136; BMI264-NEXT: retq 137entry: 138 %0 = lshr i32 %x, 25 139 %1 = shl i32 %x, 7 140 %2 = or i32 %0, %1 141 ret i32 %2 142} 143 144define i32 @xfoop(ptr %p) nounwind readnone { 145; X86-LABEL: xfoop: 146; X86: # %bb.0: # %entry 147; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 148; X86-NEXT: movl (%eax), %eax 149; X86-NEXT: roll $7, %eax 150; X86-NEXT: retl 151; 152; SHLD-LABEL: xfoop: 153; SHLD: # %bb.0: # %entry 154; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 155; SHLD-NEXT: movl (%eax), %eax 156; SHLD-NEXT: shldl $7, %eax, %eax 157; SHLD-NEXT: retl 158; 159; BMI2-LABEL: xfoop: 160; BMI2: # %bb.0: # %entry 161; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 162; BMI2-NEXT: rorxl $25, (%eax), %eax 163; BMI2-NEXT: retl 164; 165; X64-LABEL: xfoop: 166; X64: # %bb.0: # %entry 167; X64-NEXT: movl (%rdi), %eax 168; X64-NEXT: roll $7, %eax 169; X64-NEXT: retq 170; 171; SHLD64-LABEL: xfoop: 172; SHLD64: # %bb.0: # %entry 173; SHLD64-NEXT: movl (%rdi), %eax 174; SHLD64-NEXT: shldl $7, %eax, %eax 175; SHLD64-NEXT: retq 176; 177; BMI264-LABEL: xfoop: 178; BMI264: # %bb.0: # %entry 179; BMI264-NEXT: rorxl $25, (%rdi), %eax 180; BMI264-NEXT: retq 181entry: 182 %x = load i32, ptr %p 183 %a = lshr i32 %x, 25 184 %b = shl i32 %x, 7 185 %c = or i32 %a, %b 186 ret i32 %c 187} 188 189define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone { 190; CHECK32-LABEL: xbar: 191; CHECK32: # %bb.0: # %entry 192; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx 193; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 194; CHECK32-NEXT: shldl $7, %ecx, %eax 195; CHECK32-NEXT: retl 196; 197; CHECK64-LABEL: xbar: 198; CHECK64: # %bb.0: # %entry 199; CHECK64-NEXT: movl %edi, %eax 200; CHECK64-NEXT: shrdl $25, %esi, %eax 201; CHECK64-NEXT: retq 202entry: 203 %0 = shl i32 %y, 7 204 %1 = lshr i32 %x, 25 205 %2 = or i32 %0, %1 206 ret i32 %2 207} 208 209define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone { 210; X86-LABEL: xun: 211; X86: # %bb.0: # %entry 212; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 213; X86-NEXT: roll $25, %eax 214; X86-NEXT: retl 215; 216; SHLD-LABEL: xun: 217; SHLD: # %bb.0: # %entry 218; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 219; SHLD-NEXT: shldl $25, %eax, %eax 220; SHLD-NEXT: retl 221; 222; BMI2-LABEL: xun: 223; BMI2: # %bb.0: # %entry 224; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax 225; BMI2-NEXT: retl 226; 227; X64-LABEL: xun: 228; X64: # %bb.0: # %entry 229; X64-NEXT: movl %edi, %eax 230; X64-NEXT: roll $25, %eax 231; X64-NEXT: retq 232; 233; SHLD64-LABEL: xun: 234; SHLD64: # %bb.0: # %entry 235; SHLD64-NEXT: movl %edi, %eax 236; SHLD64-NEXT: shldl $25, %eax, %eax 237; SHLD64-NEXT: retq 238; 239; BMI264-LABEL: xun: 240; BMI264: # %bb.0: # %entry 241; BMI264-NEXT: rorxl $7, %edi, %eax 242; BMI264-NEXT: retq 243entry: 244 %0 = lshr i32 %x, 7 245 %1 = shl i32 %x, 25 246 %2 = or i32 %0, %1 247 ret i32 %2 248} 249 250define i32 @xunp(ptr %p) nounwind readnone { 251; X86-LABEL: xunp: 252; X86: # %bb.0: # %entry 253; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 254; X86-NEXT: movl (%eax), %eax 255; X86-NEXT: roll $25, %eax 256; X86-NEXT: retl 257; 258; SHLD-LABEL: xunp: 259; SHLD: # %bb.0: # %entry 260; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 261; SHLD-NEXT: movl (%eax), %eax 262; SHLD-NEXT: shldl $25, %eax, %eax 263; SHLD-NEXT: retl 264; 265; BMI2-LABEL: xunp: 266; BMI2: # %bb.0: # %entry 267; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 268; BMI2-NEXT: rorxl $7, (%eax), %eax 269; BMI2-NEXT: retl 270; 271; X64-LABEL: xunp: 272; X64: # %bb.0: # %entry 273; X64-NEXT: movl (%rdi), %eax 274; X64-NEXT: roll $25, %eax 275; X64-NEXT: retq 276; 277; SHLD64-LABEL: xunp: 278; SHLD64: # %bb.0: # %entry 279; SHLD64-NEXT: movl (%rdi), %eax 280; SHLD64-NEXT: shldl $25, %eax, %eax 281; SHLD64-NEXT: retq 282; 283; BMI264-LABEL: xunp: 284; BMI264: # %bb.0: # %entry 285; BMI264-NEXT: rorxl $7, (%rdi), %eax 286; BMI264-NEXT: retq 287entry: 288 %x = load i32, ptr %p 289 %a = lshr i32 %x, 7 290 %b = shl i32 %x, 25 291 %c = or i32 %a, %b 292 ret i32 %c 293} 294 295define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone { 296; CHECK32-LABEL: xbu: 297; CHECK32: # %bb.0: # %entry 298; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx 299; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 300; CHECK32-NEXT: shldl $25, %ecx, %eax 301; CHECK32-NEXT: retl 302; 303; CHECK64-LABEL: xbu: 304; CHECK64: # %bb.0: # %entry 305; CHECK64-NEXT: movl %edi, %eax 306; CHECK64-NEXT: shldl $25, %esi, %eax 307; CHECK64-NEXT: retq 308entry: 309 %0 = lshr i32 %y, 7 310 %1 = shl i32 %x, 25 311 %2 = or i32 %0, %1 312 ret i32 %2 313} 314 315define i32 @fshl(i32 %x) nounwind { 316; X86-LABEL: fshl: 317; X86: # %bb.0: 318; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 319; X86-NEXT: roll $7, %eax 320; X86-NEXT: retl 321; 322; SHLD-LABEL: fshl: 323; SHLD: # %bb.0: 324; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 325; SHLD-NEXT: shldl $7, %eax, %eax 326; SHLD-NEXT: retl 327; 328; BMI2-LABEL: fshl: 329; BMI2: # %bb.0: 330; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax 331; BMI2-NEXT: retl 332; 333; X64-LABEL: fshl: 334; X64: # %bb.0: 335; X64-NEXT: movl %edi, %eax 336; X64-NEXT: roll $7, %eax 337; X64-NEXT: retq 338; 339; SHLD64-LABEL: fshl: 340; SHLD64: # %bb.0: 341; SHLD64-NEXT: movl %edi, %eax 342; SHLD64-NEXT: shldl $7, %eax, %eax 343; SHLD64-NEXT: retq 344; 345; BMI264-LABEL: fshl: 346; BMI264: # %bb.0: 347; BMI264-NEXT: rorxl $25, %edi, %eax 348; BMI264-NEXT: retq 349 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 7) 350 ret i32 %f 351} 352declare i32 @llvm.fshl.i32(i32, i32, i32) 353 354define i32 @fshl1(i32 %x) nounwind { 355; X86-LABEL: fshl1: 356; X86: # %bb.0: 357; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 358; X86-NEXT: roll %eax 359; X86-NEXT: retl 360; 361; SHLD-LABEL: fshl1: 362; SHLD: # %bb.0: 363; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 364; SHLD-NEXT: shldl $1, %eax, %eax 365; SHLD-NEXT: retl 366; 367; BMI2-LABEL: fshl1: 368; BMI2: # %bb.0: 369; BMI2-NEXT: rorxl $31, {{[0-9]+}}(%esp), %eax 370; BMI2-NEXT: retl 371; 372; X64-LABEL: fshl1: 373; X64: # %bb.0: 374; X64-NEXT: movl %edi, %eax 375; X64-NEXT: roll %eax 376; X64-NEXT: retq 377; 378; SHLD64-LABEL: fshl1: 379; SHLD64: # %bb.0: 380; SHLD64-NEXT: movl %edi, %eax 381; SHLD64-NEXT: shldl $1, %eax, %eax 382; SHLD64-NEXT: retq 383; 384; BMI264-LABEL: fshl1: 385; BMI264: # %bb.0: 386; BMI264-NEXT: rorxl $31, %edi, %eax 387; BMI264-NEXT: retq 388 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 1) 389 ret i32 %f 390} 391 392define i32 @fshl31(i32 %x) nounwind { 393; X86-LABEL: fshl31: 394; X86: # %bb.0: 395; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 396; X86-NEXT: rorl %eax 397; X86-NEXT: retl 398; 399; SHLD-LABEL: fshl31: 400; SHLD: # %bb.0: 401; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 402; SHLD-NEXT: shldl $31, %eax, %eax 403; SHLD-NEXT: retl 404; 405; BMI2-LABEL: fshl31: 406; BMI2: # %bb.0: 407; BMI2-NEXT: rorxl $1, {{[0-9]+}}(%esp), %eax 408; BMI2-NEXT: retl 409; 410; X64-LABEL: fshl31: 411; X64: # %bb.0: 412; X64-NEXT: movl %edi, %eax 413; X64-NEXT: rorl %eax 414; X64-NEXT: retq 415; 416; SHLD64-LABEL: fshl31: 417; SHLD64: # %bb.0: 418; SHLD64-NEXT: movl %edi, %eax 419; SHLD64-NEXT: shldl $31, %eax, %eax 420; SHLD64-NEXT: retq 421; 422; BMI264-LABEL: fshl31: 423; BMI264: # %bb.0: 424; BMI264-NEXT: rorxl $1, %edi, %eax 425; BMI264-NEXT: retq 426 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 31) 427 ret i32 %f 428} 429 430define i32 @fshl_load(ptr %p) nounwind { 431; X86-LABEL: fshl_load: 432; X86: # %bb.0: 433; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 434; X86-NEXT: movl (%eax), %eax 435; X86-NEXT: roll $7, %eax 436; X86-NEXT: retl 437; 438; SHLD-LABEL: fshl_load: 439; SHLD: # %bb.0: 440; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 441; SHLD-NEXT: movl (%eax), %eax 442; SHLD-NEXT: shldl $7, %eax, %eax 443; SHLD-NEXT: retl 444; 445; BMI2-LABEL: fshl_load: 446; BMI2: # %bb.0: 447; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 448; BMI2-NEXT: rorxl $25, (%eax), %eax 449; BMI2-NEXT: retl 450; 451; X64-LABEL: fshl_load: 452; X64: # %bb.0: 453; X64-NEXT: movl (%rdi), %eax 454; X64-NEXT: roll $7, %eax 455; X64-NEXT: retq 456; 457; SHLD64-LABEL: fshl_load: 458; SHLD64: # %bb.0: 459; SHLD64-NEXT: movl (%rdi), %eax 460; SHLD64-NEXT: shldl $7, %eax, %eax 461; SHLD64-NEXT: retq 462; 463; BMI264-LABEL: fshl_load: 464; BMI264: # %bb.0: 465; BMI264-NEXT: rorxl $25, (%rdi), %eax 466; BMI264-NEXT: retq 467 %x = load i32, ptr %p 468 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 7) 469 ret i32 %f 470} 471 472define i32 @fshr(i32 %x) nounwind { 473; X86-LABEL: fshr: 474; X86: # %bb.0: 475; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 476; X86-NEXT: rorl $7, %eax 477; X86-NEXT: retl 478; 479; SHLD-LABEL: fshr: 480; SHLD: # %bb.0: 481; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 482; SHLD-NEXT: shrdl $7, %eax, %eax 483; SHLD-NEXT: retl 484; 485; BMI2-LABEL: fshr: 486; BMI2: # %bb.0: 487; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax 488; BMI2-NEXT: retl 489; 490; X64-LABEL: fshr: 491; X64: # %bb.0: 492; X64-NEXT: movl %edi, %eax 493; X64-NEXT: rorl $7, %eax 494; X64-NEXT: retq 495; 496; SHLD64-LABEL: fshr: 497; SHLD64: # %bb.0: 498; SHLD64-NEXT: movl %edi, %eax 499; SHLD64-NEXT: shrdl $7, %eax, %eax 500; SHLD64-NEXT: retq 501; 502; BMI264-LABEL: fshr: 503; BMI264: # %bb.0: 504; BMI264-NEXT: rorxl $7, %edi, %eax 505; BMI264-NEXT: retq 506 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 7) 507 ret i32 %f 508} 509declare i32 @llvm.fshr.i32(i32, i32, i32) 510 511define i32 @fshr1(i32 %x) nounwind { 512; X86-LABEL: fshr1: 513; X86: # %bb.0: 514; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 515; X86-NEXT: rorl %eax 516; X86-NEXT: retl 517; 518; SHLD-LABEL: fshr1: 519; SHLD: # %bb.0: 520; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 521; SHLD-NEXT: shrdl $1, %eax, %eax 522; SHLD-NEXT: retl 523; 524; BMI2-LABEL: fshr1: 525; BMI2: # %bb.0: 526; BMI2-NEXT: rorxl $1, {{[0-9]+}}(%esp), %eax 527; BMI2-NEXT: retl 528; 529; X64-LABEL: fshr1: 530; X64: # %bb.0: 531; X64-NEXT: movl %edi, %eax 532; X64-NEXT: rorl %eax 533; X64-NEXT: retq 534; 535; SHLD64-LABEL: fshr1: 536; SHLD64: # %bb.0: 537; SHLD64-NEXT: movl %edi, %eax 538; SHLD64-NEXT: shrdl $1, %eax, %eax 539; SHLD64-NEXT: retq 540; 541; BMI264-LABEL: fshr1: 542; BMI264: # %bb.0: 543; BMI264-NEXT: rorxl $1, %edi, %eax 544; BMI264-NEXT: retq 545 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 1) 546 ret i32 %f 547} 548 549define i32 @fshr31(i32 %x) nounwind { 550; X86-LABEL: fshr31: 551; X86: # %bb.0: 552; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 553; X86-NEXT: roll %eax 554; X86-NEXT: retl 555; 556; SHLD-LABEL: fshr31: 557; SHLD: # %bb.0: 558; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 559; SHLD-NEXT: shrdl $31, %eax, %eax 560; SHLD-NEXT: retl 561; 562; BMI2-LABEL: fshr31: 563; BMI2: # %bb.0: 564; BMI2-NEXT: rorxl $31, {{[0-9]+}}(%esp), %eax 565; BMI2-NEXT: retl 566; 567; X64-LABEL: fshr31: 568; X64: # %bb.0: 569; X64-NEXT: movl %edi, %eax 570; X64-NEXT: roll %eax 571; X64-NEXT: retq 572; 573; SHLD64-LABEL: fshr31: 574; SHLD64: # %bb.0: 575; SHLD64-NEXT: movl %edi, %eax 576; SHLD64-NEXT: shrdl $31, %eax, %eax 577; SHLD64-NEXT: retq 578; 579; BMI264-LABEL: fshr31: 580; BMI264: # %bb.0: 581; BMI264-NEXT: rorxl $31, %edi, %eax 582; BMI264-NEXT: retq 583 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 31) 584 ret i32 %f 585} 586 587define i32 @fshr_load(ptr %p) nounwind { 588; X86-LABEL: fshr_load: 589; X86: # %bb.0: 590; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 591; X86-NEXT: movl (%eax), %eax 592; X86-NEXT: rorl $7, %eax 593; X86-NEXT: retl 594; 595; SHLD-LABEL: fshr_load: 596; SHLD: # %bb.0: 597; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 598; SHLD-NEXT: movl (%eax), %eax 599; SHLD-NEXT: shrdl $7, %eax, %eax 600; SHLD-NEXT: retl 601; 602; BMI2-LABEL: fshr_load: 603; BMI2: # %bb.0: 604; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 605; BMI2-NEXT: rorxl $7, (%eax), %eax 606; BMI2-NEXT: retl 607; 608; X64-LABEL: fshr_load: 609; X64: # %bb.0: 610; X64-NEXT: movl (%rdi), %eax 611; X64-NEXT: rorl $7, %eax 612; X64-NEXT: retq 613; 614; SHLD64-LABEL: fshr_load: 615; SHLD64: # %bb.0: 616; SHLD64-NEXT: movl (%rdi), %eax 617; SHLD64-NEXT: shrdl $7, %eax, %eax 618; SHLD64-NEXT: retq 619; 620; BMI264-LABEL: fshr_load: 621; BMI264: # %bb.0: 622; BMI264-NEXT: rorxl $7, (%rdi), %eax 623; BMI264-NEXT: retq 624 %x = load i32, ptr %p 625 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 7) 626 ret i32 %f 627} 628