1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 3; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86 4 5; shift left 6 7define i32 @and_signbit_shl(i32 %x, ptr %dst) { 8; X64-LABEL: and_signbit_shl: 9; X64: # %bb.0: 10; X64-NEXT: movl %edi, %eax 11; X64-NEXT: shll $8, %eax 12; X64-NEXT: andl $-16777216, %eax # imm = 0xFF000000 13; X64-NEXT: movl %eax, (%rsi) 14; X64-NEXT: retq 15; 16; X86-LABEL: and_signbit_shl: 17; X86: # %bb.0: 18; X86-NEXT: movl 8(%esp), %ecx 19; X86-NEXT: movzbl 6(%esp), %eax 20; X86-NEXT: shll $24, %eax 21; X86-NEXT: movl %eax, (%ecx) 22; X86-NEXT: retl 23 %t0 = and i32 %x, 4294901760 ; 0xFFFF0000 24 %r = shl i32 %t0, 8 25 store i32 %r, ptr %dst 26 ret i32 %r 27} 28define i32 @and_nosignbit_shl(i32 %x, ptr %dst) { 29; X64-LABEL: and_nosignbit_shl: 30; X64: # %bb.0: 31; X64-NEXT: movl %edi, %eax 32; X64-NEXT: shll $8, %eax 33; X64-NEXT: andl $-16777216, %eax # imm = 0xFF000000 34; X64-NEXT: movl %eax, (%rsi) 35; X64-NEXT: retq 36; 37; X86-LABEL: and_nosignbit_shl: 38; X86: # %bb.0: 39; X86-NEXT: movl 8(%esp), %ecx 40; X86-NEXT: movzbl 6(%esp), %eax 41; X86-NEXT: shll $24, %eax 42; X86-NEXT: movl %eax, (%ecx) 43; X86-NEXT: retl 44 %t0 = and i32 %x, 2147418112 ; 0x7FFF0000 45 %r = shl i32 %t0, 8 46 store i32 %r, ptr %dst 47 ret i32 %r 48} 49 50define i32 @or_signbit_shl(i32 %x, ptr %dst) { 51; X64-LABEL: or_signbit_shl: 52; X64: # %bb.0: 53; X64-NEXT: movl %edi, %eax 54; X64-NEXT: shll $8, %eax 55; X64-NEXT: orl $-16777216, %eax # imm = 0xFF000000 56; X64-NEXT: movl %eax, (%rsi) 57; X64-NEXT: retq 58; 59; X86-LABEL: or_signbit_shl: 60; X86: # %bb.0: 61; X86-NEXT: movl 8(%esp), %ecx 62; X86-NEXT: movl 4(%esp), %eax 63; X86-NEXT: shll $8, %eax 64; X86-NEXT: orl $-16777216, %eax # imm = 0xFF000000 65; X86-NEXT: movl %eax, (%ecx) 66; X86-NEXT: retl 67 %t0 = or i32 %x, 4294901760 ; 0xFFFF0000 68 %r = shl i32 %t0, 8 69 store i32 %r, ptr %dst 70 ret i32 %r 71} 72define i32 @or_nosignbit_shl(i32 %x, ptr %dst) { 73; X64-LABEL: or_nosignbit_shl: 74; X64: # %bb.0: 75; X64-NEXT: movl %edi, %eax 76; X64-NEXT: shll $8, %eax 77; X64-NEXT: orl $-16777216, %eax # imm = 0xFF000000 78; X64-NEXT: movl %eax, (%rsi) 79; X64-NEXT: retq 80; 81; X86-LABEL: or_nosignbit_shl: 82; X86: # %bb.0: 83; X86-NEXT: movl 8(%esp), %ecx 84; X86-NEXT: movl 4(%esp), %eax 85; X86-NEXT: shll $8, %eax 86; X86-NEXT: orl $-16777216, %eax # imm = 0xFF000000 87; X86-NEXT: movl %eax, (%ecx) 88; X86-NEXT: retl 89 %t0 = or i32 %x, 2147418112 ; 0x7FFF0000 90 %r = shl i32 %t0, 8 91 store i32 %r, ptr %dst 92 ret i32 %r 93} 94 95define i32 @xor_signbit_shl(i32 %x, ptr %dst) { 96; X64-LABEL: xor_signbit_shl: 97; X64: # %bb.0: 98; X64-NEXT: movl %edi, %eax 99; X64-NEXT: shll $8, %eax 100; X64-NEXT: xorl $-16777216, %eax # imm = 0xFF000000 101; X64-NEXT: movl %eax, (%rsi) 102; X64-NEXT: retq 103; 104; X86-LABEL: xor_signbit_shl: 105; X86: # %bb.0: 106; X86-NEXT: movl 8(%esp), %ecx 107; X86-NEXT: movl $16711680, %eax # imm = 0xFF0000 108; X86-NEXT: xorl 4(%esp), %eax 109; X86-NEXT: shll $8, %eax 110; X86-NEXT: movl %eax, (%ecx) 111; X86-NEXT: retl 112 %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000 113 %r = shl i32 %t0, 8 114 store i32 %r, ptr %dst 115 ret i32 %r 116} 117define i32 @xor_nosignbit_shl(i32 %x, ptr %dst) { 118; X64-LABEL: xor_nosignbit_shl: 119; X64: # %bb.0: 120; X64-NEXT: movl %edi, %eax 121; X64-NEXT: shll $8, %eax 122; X64-NEXT: xorl $-16777216, %eax # imm = 0xFF000000 123; X64-NEXT: movl %eax, (%rsi) 124; X64-NEXT: retq 125; 126; X86-LABEL: xor_nosignbit_shl: 127; X86: # %bb.0: 128; X86-NEXT: movl 8(%esp), %ecx 129; X86-NEXT: movl $16711680, %eax # imm = 0xFF0000 130; X86-NEXT: xorl 4(%esp), %eax 131; X86-NEXT: shll $8, %eax 132; X86-NEXT: movl %eax, (%ecx) 133; X86-NEXT: retl 134 %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000 135 %r = shl i32 %t0, 8 136 store i32 %r, ptr %dst 137 ret i32 %r 138} 139 140define i32 @add_signbit_shl(i32 %x, ptr %dst) { 141; X64-LABEL: add_signbit_shl: 142; X64: # %bb.0: 143; X64-NEXT: # kill: def $edi killed $edi def $rdi 144; X64-NEXT: shll $8, %edi 145; X64-NEXT: leal -16777216(%rdi), %eax 146; X64-NEXT: movl %eax, (%rsi) 147; X64-NEXT: retq 148; 149; X86-LABEL: add_signbit_shl: 150; X86: # %bb.0: 151; X86-NEXT: movl 8(%esp), %ecx 152; X86-NEXT: movl 4(%esp), %eax 153; X86-NEXT: shll $8, %eax 154; X86-NEXT: addl $-16777216, %eax # imm = 0xFF000000 155; X86-NEXT: movl %eax, (%ecx) 156; X86-NEXT: retl 157 %t0 = add i32 %x, 4294901760 ; 0xFFFF0000 158 %r = shl i32 %t0, 8 159 store i32 %r, ptr %dst 160 ret i32 %r 161} 162define i32 @add_nosignbit_shl(i32 %x, ptr %dst) { 163; X64-LABEL: add_nosignbit_shl: 164; X64: # %bb.0: 165; X64-NEXT: # kill: def $edi killed $edi def $rdi 166; X64-NEXT: shll $8, %edi 167; X64-NEXT: leal -16777216(%rdi), %eax 168; X64-NEXT: movl %eax, (%rsi) 169; X64-NEXT: retq 170; 171; X86-LABEL: add_nosignbit_shl: 172; X86: # %bb.0: 173; X86-NEXT: movl 8(%esp), %ecx 174; X86-NEXT: movl 4(%esp), %eax 175; X86-NEXT: shll $8, %eax 176; X86-NEXT: addl $-16777216, %eax # imm = 0xFF000000 177; X86-NEXT: movl %eax, (%ecx) 178; X86-NEXT: retl 179 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000 180 %r = shl i32 %t0, 8 181 store i32 %r, ptr %dst 182 ret i32 %r 183} 184 185; logical shift right 186 187define i32 @and_signbit_lshr(i32 %x, ptr %dst) { 188; X64-LABEL: and_signbit_lshr: 189; X64: # %bb.0: 190; X64-NEXT: movl %edi, %eax 191; X64-NEXT: shrl $8, %eax 192; X64-NEXT: andl $16776960, %eax # imm = 0xFFFF00 193; X64-NEXT: movl %eax, (%rsi) 194; X64-NEXT: retq 195; 196; X86-LABEL: and_signbit_lshr: 197; X86: # %bb.0: 198; X86-NEXT: movl 8(%esp), %ecx 199; X86-NEXT: movzwl 6(%esp), %eax 200; X86-NEXT: shll $8, %eax 201; X86-NEXT: movl %eax, (%ecx) 202; X86-NEXT: retl 203 %t0 = and i32 %x, 4294901760 ; 0xFFFF0000 204 %r = lshr i32 %t0, 8 205 store i32 %r, ptr %dst 206 ret i32 %r 207} 208define i32 @and_nosignbit_lshr(i32 %x, ptr %dst) { 209; X64-LABEL: and_nosignbit_lshr: 210; X64: # %bb.0: 211; X64-NEXT: movl %edi, %eax 212; X64-NEXT: shrl $8, %eax 213; X64-NEXT: andl $8388352, %eax # imm = 0x7FFF00 214; X64-NEXT: movl %eax, (%rsi) 215; X64-NEXT: retq 216; 217; X86-LABEL: and_nosignbit_lshr: 218; X86: # %bb.0: 219; X86-NEXT: movl 8(%esp), %ecx 220; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000 221; X86-NEXT: andl 4(%esp), %eax 222; X86-NEXT: shrl $8, %eax 223; X86-NEXT: movl %eax, (%ecx) 224; X86-NEXT: retl 225 %t0 = and i32 %x, 2147418112 ; 0x7FFF0000 226 %r = lshr i32 %t0, 8 227 store i32 %r, ptr %dst 228 ret i32 %r 229} 230 231define i32 @or_signbit_lshr(i32 %x, ptr %dst) { 232; X64-LABEL: or_signbit_lshr: 233; X64: # %bb.0: 234; X64-NEXT: movl %edi, %eax 235; X64-NEXT: shrl $8, %eax 236; X64-NEXT: orl $16776960, %eax # imm = 0xFFFF00 237; X64-NEXT: movl %eax, (%rsi) 238; X64-NEXT: retq 239; 240; X86-LABEL: or_signbit_lshr: 241; X86: # %bb.0: 242; X86-NEXT: movl 8(%esp), %ecx 243; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000 244; X86-NEXT: orl 4(%esp), %eax 245; X86-NEXT: shrl $8, %eax 246; X86-NEXT: movl %eax, (%ecx) 247; X86-NEXT: retl 248 %t0 = or i32 %x, 4294901760 ; 0xFFFF0000 249 %r = lshr i32 %t0, 8 250 store i32 %r, ptr %dst 251 ret i32 %r 252} 253define i32 @or_nosignbit_lshr(i32 %x, ptr %dst) { 254; X64-LABEL: or_nosignbit_lshr: 255; X64: # %bb.0: 256; X64-NEXT: movl %edi, %eax 257; X64-NEXT: shrl $8, %eax 258; X64-NEXT: orl $8388352, %eax # imm = 0x7FFF00 259; X64-NEXT: movl %eax, (%rsi) 260; X64-NEXT: retq 261; 262; X86-LABEL: or_nosignbit_lshr: 263; X86: # %bb.0: 264; X86-NEXT: movl 8(%esp), %ecx 265; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000 266; X86-NEXT: orl 4(%esp), %eax 267; X86-NEXT: shrl $8, %eax 268; X86-NEXT: movl %eax, (%ecx) 269; X86-NEXT: retl 270 %t0 = or i32 %x, 2147418112 ; 0x7FFF0000 271 %r = lshr i32 %t0, 8 272 store i32 %r, ptr %dst 273 ret i32 %r 274} 275 276define i32 @xor_signbit_lshr(i32 %x, ptr %dst) { 277; X64-LABEL: xor_signbit_lshr: 278; X64: # %bb.0: 279; X64-NEXT: movl %edi, %eax 280; X64-NEXT: shrl $8, %eax 281; X64-NEXT: xorl $16776960, %eax # imm = 0xFFFF00 282; X64-NEXT: movl %eax, (%rsi) 283; X64-NEXT: retq 284; 285; X86-LABEL: xor_signbit_lshr: 286; X86: # %bb.0: 287; X86-NEXT: movl 8(%esp), %ecx 288; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000 289; X86-NEXT: xorl 4(%esp), %eax 290; X86-NEXT: shrl $8, %eax 291; X86-NEXT: movl %eax, (%ecx) 292; X86-NEXT: retl 293 %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000 294 %r = lshr i32 %t0, 8 295 store i32 %r, ptr %dst 296 ret i32 %r 297} 298define i32 @xor_nosignbit_lshr(i32 %x, ptr %dst) { 299; X64-LABEL: xor_nosignbit_lshr: 300; X64: # %bb.0: 301; X64-NEXT: movl %edi, %eax 302; X64-NEXT: shrl $8, %eax 303; X64-NEXT: xorl $8388352, %eax # imm = 0x7FFF00 304; X64-NEXT: movl %eax, (%rsi) 305; X64-NEXT: retq 306; 307; X86-LABEL: xor_nosignbit_lshr: 308; X86: # %bb.0: 309; X86-NEXT: movl 8(%esp), %ecx 310; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000 311; X86-NEXT: xorl 4(%esp), %eax 312; X86-NEXT: shrl $8, %eax 313; X86-NEXT: movl %eax, (%ecx) 314; X86-NEXT: retl 315 %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000 316 %r = lshr i32 %t0, 8 317 store i32 %r, ptr %dst 318 ret i32 %r 319} 320 321define i32 @add_signbit_lshr(i32 %x, ptr %dst) { 322; X64-LABEL: add_signbit_lshr: 323; X64: # %bb.0: 324; X64-NEXT: # kill: def $edi killed $edi def $rdi 325; X64-NEXT: leal -65536(%rdi), %eax 326; X64-NEXT: shrl $8, %eax 327; X64-NEXT: movl %eax, (%rsi) 328; X64-NEXT: retq 329; 330; X86-LABEL: add_signbit_lshr: 331; X86: # %bb.0: 332; X86-NEXT: movl 8(%esp), %ecx 333; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000 334; X86-NEXT: addl 4(%esp), %eax 335; X86-NEXT: shrl $8, %eax 336; X86-NEXT: movl %eax, (%ecx) 337; X86-NEXT: retl 338 %t0 = add i32 %x, 4294901760 ; 0xFFFF0000 339 %r = lshr i32 %t0, 8 340 store i32 %r, ptr %dst 341 ret i32 %r 342} 343define i32 @add_nosignbit_lshr(i32 %x, ptr %dst) { 344; X64-LABEL: add_nosignbit_lshr: 345; X64: # %bb.0: 346; X64-NEXT: # kill: def $edi killed $edi def $rdi 347; X64-NEXT: leal 2147418112(%rdi), %eax 348; X64-NEXT: shrl $8, %eax 349; X64-NEXT: movl %eax, (%rsi) 350; X64-NEXT: retq 351; 352; X86-LABEL: add_nosignbit_lshr: 353; X86: # %bb.0: 354; X86-NEXT: movl 8(%esp), %ecx 355; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000 356; X86-NEXT: addl 4(%esp), %eax 357; X86-NEXT: shrl $8, %eax 358; X86-NEXT: movl %eax, (%ecx) 359; X86-NEXT: retl 360 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000 361 %r = lshr i32 %t0, 8 362 store i32 %r, ptr %dst 363 ret i32 %r 364} 365 366; arithmetic shift right 367 368define i32 @and_signbit_ashr(i32 %x, ptr %dst) { 369; X64-LABEL: and_signbit_ashr: 370; X64: # %bb.0: 371; X64-NEXT: movl %edi, %eax 372; X64-NEXT: sarl $8, %eax 373; X64-NEXT: andl $-256, %eax 374; X64-NEXT: movl %eax, (%rsi) 375; X64-NEXT: retq 376; 377; X86-LABEL: and_signbit_ashr: 378; X86: # %bb.0: 379; X86-NEXT: movl 8(%esp), %ecx 380; X86-NEXT: movswl 6(%esp), %eax 381; X86-NEXT: shll $8, %eax 382; X86-NEXT: movl %eax, (%ecx) 383; X86-NEXT: retl 384 %t0 = and i32 %x, 4294901760 ; 0xFFFF0000 385 %r = ashr i32 %t0, 8 386 store i32 %r, ptr %dst 387 ret i32 %r 388} 389define i32 @and_nosignbit_ashr(i32 %x, ptr %dst) { 390; X64-LABEL: and_nosignbit_ashr: 391; X64: # %bb.0: 392; X64-NEXT: movl %edi, %eax 393; X64-NEXT: shrl $8, %eax 394; X64-NEXT: andl $8388352, %eax # imm = 0x7FFF00 395; X64-NEXT: movl %eax, (%rsi) 396; X64-NEXT: retq 397; 398; X86-LABEL: and_nosignbit_ashr: 399; X86: # %bb.0: 400; X86-NEXT: movl 8(%esp), %ecx 401; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000 402; X86-NEXT: andl 4(%esp), %eax 403; X86-NEXT: shrl $8, %eax 404; X86-NEXT: movl %eax, (%ecx) 405; X86-NEXT: retl 406 %t0 = and i32 %x, 2147418112 ; 0x7FFF0000 407 %r = ashr i32 %t0, 8 408 store i32 %r, ptr %dst 409 ret i32 %r 410} 411 412define i32 @or_signbit_ashr(i32 %x, ptr %dst) { 413; X64-LABEL: or_signbit_ashr: 414; X64: # %bb.0: 415; X64-NEXT: movl %edi, %eax 416; X64-NEXT: shrl $8, %eax 417; X64-NEXT: orl $-256, %eax 418; X64-NEXT: movl %eax, (%rsi) 419; X64-NEXT: retq 420; 421; X86-LABEL: or_signbit_ashr: 422; X86: # %bb.0: 423; X86-NEXT: movl 8(%esp), %ecx 424; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000 425; X86-NEXT: orl 4(%esp), %eax 426; X86-NEXT: sarl $8, %eax 427; X86-NEXT: movl %eax, (%ecx) 428; X86-NEXT: retl 429 %t0 = or i32 %x, 4294901760 ; 0xFFFF0000 430 %r = ashr i32 %t0, 8 431 store i32 %r, ptr %dst 432 ret i32 %r 433} 434define i32 @or_nosignbit_ashr(i32 %x, ptr %dst) { 435; X64-LABEL: or_nosignbit_ashr: 436; X64: # %bb.0: 437; X64-NEXT: movl %edi, %eax 438; X64-NEXT: sarl $8, %eax 439; X64-NEXT: orl $8388352, %eax # imm = 0x7FFF00 440; X64-NEXT: movl %eax, (%rsi) 441; X64-NEXT: retq 442; 443; X86-LABEL: or_nosignbit_ashr: 444; X86: # %bb.0: 445; X86-NEXT: movl 8(%esp), %ecx 446; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000 447; X86-NEXT: orl 4(%esp), %eax 448; X86-NEXT: sarl $8, %eax 449; X86-NEXT: movl %eax, (%ecx) 450; X86-NEXT: retl 451 %t0 = or i32 %x, 2147418112 ; 0x7FFF0000 452 %r = ashr i32 %t0, 8 453 store i32 %r, ptr %dst 454 ret i32 %r 455} 456 457define i32 @xor_signbit_ashr(i32 %x, ptr %dst) { 458; X64-LABEL: xor_signbit_ashr: 459; X64: # %bb.0: 460; X64-NEXT: movl %edi, %eax 461; X64-NEXT: sarl $8, %eax 462; X64-NEXT: xorl $-256, %eax 463; X64-NEXT: movl %eax, (%rsi) 464; X64-NEXT: retq 465; 466; X86-LABEL: xor_signbit_ashr: 467; X86: # %bb.0: 468; X86-NEXT: movl 8(%esp), %ecx 469; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000 470; X86-NEXT: xorl 4(%esp), %eax 471; X86-NEXT: sarl $8, %eax 472; X86-NEXT: movl %eax, (%ecx) 473; X86-NEXT: retl 474 %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000 475 %r = ashr i32 %t0, 8 476 store i32 %r, ptr %dst 477 ret i32 %r 478} 479define i32 @xor_nosignbit_ashr(i32 %x, ptr %dst) { 480; X64-LABEL: xor_nosignbit_ashr: 481; X64: # %bb.0: 482; X64-NEXT: movl %edi, %eax 483; X64-NEXT: sarl $8, %eax 484; X64-NEXT: xorl $8388352, %eax # imm = 0x7FFF00 485; X64-NEXT: movl %eax, (%rsi) 486; X64-NEXT: retq 487; 488; X86-LABEL: xor_nosignbit_ashr: 489; X86: # %bb.0: 490; X86-NEXT: movl 8(%esp), %ecx 491; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000 492; X86-NEXT: xorl 4(%esp), %eax 493; X86-NEXT: sarl $8, %eax 494; X86-NEXT: movl %eax, (%ecx) 495; X86-NEXT: retl 496 %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000 497 %r = ashr i32 %t0, 8 498 store i32 %r, ptr %dst 499 ret i32 %r 500} 501 502define i32 @add_signbit_ashr(i32 %x, ptr %dst) { 503; X64-LABEL: add_signbit_ashr: 504; X64: # %bb.0: 505; X64-NEXT: # kill: def $edi killed $edi def $rdi 506; X64-NEXT: leal -65536(%rdi), %eax 507; X64-NEXT: sarl $8, %eax 508; X64-NEXT: movl %eax, (%rsi) 509; X64-NEXT: retq 510; 511; X86-LABEL: add_signbit_ashr: 512; X86: # %bb.0: 513; X86-NEXT: movl 8(%esp), %ecx 514; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000 515; X86-NEXT: addl 4(%esp), %eax 516; X86-NEXT: sarl $8, %eax 517; X86-NEXT: movl %eax, (%ecx) 518; X86-NEXT: retl 519 %t0 = add i32 %x, 4294901760 ; 0xFFFF0000 520 %r = ashr i32 %t0, 8 521 store i32 %r, ptr %dst 522 ret i32 %r 523} 524define i32 @add_nosignbit_ashr(i32 %x, ptr %dst) { 525; X64-LABEL: add_nosignbit_ashr: 526; X64: # %bb.0: 527; X64-NEXT: # kill: def $edi killed $edi def $rdi 528; X64-NEXT: leal 2147418112(%rdi), %eax 529; X64-NEXT: sarl $8, %eax 530; X64-NEXT: movl %eax, (%rsi) 531; X64-NEXT: retq 532; 533; X86-LABEL: add_nosignbit_ashr: 534; X86: # %bb.0: 535; X86-NEXT: movl 8(%esp), %ecx 536; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000 537; X86-NEXT: addl 4(%esp), %eax 538; X86-NEXT: sarl $8, %eax 539; X86-NEXT: movl %eax, (%ecx) 540; X86-NEXT: retl 541 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000 542 %r = ashr i32 %t0, 8 543 store i32 %r, ptr %dst 544 ret i32 %r 545} 546