xref: /llvm-project/llvm/test/CodeGen/X86/pr40090.ll (revision 7b03fdbd560ca10bc7873a4887eda3cc6738d186)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
3
4define i64 @foo(i64 %x, i64 %y) {
5; CHECK-LABEL: foo:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    bsrq %rdi, %rax
8; CHECK-NEXT:    orq $64, %rax
9; CHECK-NEXT:    bsrq %rsi, %rcx
10; CHECK-NEXT:    cmoveq %rax, %rcx
11; CHECK-NEXT:    movl $63, %eax
12; CHECK-NEXT:    subq %rcx, %rax
13; CHECK-NEXT:    retq
14  %1 = tail call i64 @llvm.ctlz.i64(i64 %x, i1 true)
15  %2 = xor i64 %1, 127
16  %3 = tail call i64 @llvm.ctlz.i64(i64 %y, i1 true)
17  %4 = xor i64 %3, 63
18  %5 = icmp eq i64 %y, 0
19  %6 = select i1 %5, i64 %2, i64 %4
20  %7 = sub nsw i64 63, %6
21  ret i64 %7
22}
23
24declare i64 @llvm.ctlz.i64(i64, i1)
25