1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X86 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X64 4; According to https://bugs.llvm.org/show_bug.cgi?id=32329 it checks DAG ISEL failure on SKX target 5 6%struct.AA = type { i24, [4 x i8] } 7 8@obj = external dso_local local_unnamed_addr global %struct.AA, align 8 9@var_27 = external dso_local local_unnamed_addr constant i8, align 1 10@var_2 = external dso_local local_unnamed_addr constant i16, align 2 11@var_24 = external dso_local local_unnamed_addr constant i64, align 8 12@var_310 = external dso_local local_unnamed_addr global i64, align 8 13@var_50 = external dso_local local_unnamed_addr global i64, align 8 14@var_205 = external dso_local local_unnamed_addr global i8, align 1 15@var_218 = external dso_local local_unnamed_addr global i8, align 1 16 17define void @foo() local_unnamed_addr { 18; X86-LABEL: foo: 19; X86: # %bb.0: # %entry 20; X86-NEXT: pushl %ebp 21; X86-NEXT: .cfi_def_cfa_offset 8 22; X86-NEXT: pushl %ebx 23; X86-NEXT: .cfi_def_cfa_offset 12 24; X86-NEXT: pushl %edi 25; X86-NEXT: .cfi_def_cfa_offset 16 26; X86-NEXT: pushl %esi 27; X86-NEXT: .cfi_def_cfa_offset 20 28; X86-NEXT: .cfi_offset %esi, -20 29; X86-NEXT: .cfi_offset %edi, -16 30; X86-NEXT: .cfi_offset %ebx, -12 31; X86-NEXT: .cfi_offset %ebp, -8 32; X86-NEXT: movsbl var_27, %eax 33; X86-NEXT: movzwl var_2, %ebx 34; X86-NEXT: movl var_310, %ecx 35; X86-NEXT: imull %eax, %ecx 36; X86-NEXT: addl var_24, %ecx 37; X86-NEXT: movl $4194303, %esi # imm = 0x3FFFFF 38; X86-NEXT: andl obj, %esi 39; X86-NEXT: leal (%esi,%esi), %edx 40; X86-NEXT: subl %eax, %edx 41; X86-NEXT: movl %edx, %edi 42; X86-NEXT: subl %ebx, %edi 43; X86-NEXT: imull %edi, %ecx 44; X86-NEXT: addb $113, %cl 45; X86-NEXT: movl $9, %ebx 46; X86-NEXT: xorl %ebp, %ebp 47; X86-NEXT: shldl %cl, %ebx, %ebp 48; X86-NEXT: shll %cl, %ebx 49; X86-NEXT: testb $32, %cl 50; X86-NEXT: cmovnel %ebx, %ebp 51; X86-NEXT: movl $0, %ecx 52; X86-NEXT: cmovnel %ecx, %ebx 53; X86-NEXT: cmpl %esi, %edi 54; X86-NEXT: movl %ebp, var_50+4 55; X86-NEXT: movl %ebx, var_50 56; X86-NEXT: setge var_205 57; X86-NEXT: imull %eax, %edx 58; X86-NEXT: movb %dl, var_218 59; X86-NEXT: popl %esi 60; X86-NEXT: .cfi_def_cfa_offset 16 61; X86-NEXT: popl %edi 62; X86-NEXT: .cfi_def_cfa_offset 12 63; X86-NEXT: popl %ebx 64; X86-NEXT: .cfi_def_cfa_offset 8 65; X86-NEXT: popl %ebp 66; X86-NEXT: .cfi_def_cfa_offset 4 67; X86-NEXT: retl 68; 69; X64-LABEL: foo: 70; X64: # %bb.0: # %entry 71; X64-NEXT: movsbl var_27(%rip), %eax 72; X64-NEXT: movzwl var_2(%rip), %edx 73; X64-NEXT: movl var_310(%rip), %ecx 74; X64-NEXT: imull %eax, %ecx 75; X64-NEXT: addl var_24(%rip), %ecx 76; X64-NEXT: movl $4194303, %esi # imm = 0x3FFFFF 77; X64-NEXT: andl obj(%rip), %esi 78; X64-NEXT: leal (%rsi,%rsi), %edi 79; X64-NEXT: subl %eax, %edi 80; X64-NEXT: movl %edi, %r8d 81; X64-NEXT: subl %edx, %r8d 82; X64-NEXT: imull %r8d, %ecx 83; X64-NEXT: addb $113, %cl 84; X64-NEXT: movl $9, %edx 85; X64-NEXT: # kill: def $cl killed $cl killed $ecx 86; X64-NEXT: shlq %cl, %rdx 87; X64-NEXT: movq %rdx, var_50(%rip) 88; X64-NEXT: cmpl %esi, %r8d 89; X64-NEXT: setge var_205(%rip) 90; X64-NEXT: imull %eax, %edi 91; X64-NEXT: movb %dil, var_218(%rip) 92; X64-NEXT: retq 93 entry: 94 %bf.load = load i32, ptr @obj, align 8 95 %bf.clear = shl i32 %bf.load, 1 96 %add = and i32 %bf.clear, 8388606 97 %0 = load i8, ptr @var_27, align 1 98 %conv5 = sext i8 %0 to i32 99 %sub = sub nsw i32 %add, %conv5 100 %1 = load i16, ptr @var_2, align 2 101 %conv6 = zext i16 %1 to i32 102 %sub7 = sub nsw i32 %sub, %conv6 103 %conv8 = sext i32 %sub7 to i64 104 %2 = load i64, ptr @var_24, align 8 105 %3 = load i64, ptr @var_310, align 8 106 %conv9 = sext i8 %0 to i64 107 %mul = mul i64 %3, %conv9 108 %add10 = add i64 %mul, %2 109 %mul11 = mul i64 %add10, %conv8 110 %sub12 = add i64 %mul11, 8662905354777116273 111 %shl = shl i64 9, %sub12 112 store i64 %shl, ptr @var_50, align 8 113 %bf.clear14 = and i32 %bf.load, 4194303 114 %add21 = shl nuw nsw i32 %bf.clear14, 1 115 %sub23 = sub nsw i32 %add21, %conv5 116 %sub25 = sub nsw i32 %sub23, %conv6 117 %cmp = icmp sge i32 %sub25, %bf.clear14 118 %conv30 = zext i1 %cmp to i8 119 store i8 %conv30, ptr @var_205, align 1 120 %mul43 = mul nsw i32 %sub, %conv5 121 %conv44 = trunc i32 %mul43 to i8 122 store i8 %conv44, ptr @var_218, align 1 123 ret void 124} 125