1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s 3 4@d = global i32 0, align 4 5 6; Verify the sar happens before ecx is clobbered with the parameter being 7; passed to fn3 8 9define i32 @fn4(i32 %i) #0 { 10; CHECK-LABEL: fn4: 11; CHECK: # %bb.0: # %entry 12; CHECK-NEXT: pushl %esi 13; CHECK-NEXT: subl $8, %esp 14; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 15; CHECK-NEXT: movzbl d, %ecx 16; CHECK-NEXT: movl %eax, %esi 17; CHECK-NEXT: sarl %cl, %esi 18; CHECK-NEXT: subl $8, %esp 19; CHECK-NEXT: movl $2, %ecx 20; CHECK-NEXT: movl $5, %edx 21; CHECK-NEXT: pushl %eax 22; CHECK-NEXT: pushl %esi 23; CHECK-NEXT: calll fn3@PLT 24; CHECK-NEXT: addl $16, %esp 25; CHECK-NEXT: xorl %eax, %eax 26; CHECK-NEXT: testl %esi, %esi 27; CHECK-NEXT: setle %al 28; CHECK-NEXT: addl $8, %esp 29; CHECK-NEXT: popl %esi 30; CHECK-NEXT: retl 31entry: 32 %0 = load i32, ptr @d, align 4 33 %shr = ashr i32 %i, %0 34 tail call fastcc void @fn3(i32 2, i32 5, i32 %shr, i32 %i) 35 %cmp = icmp slt i32 %shr, 1 36 %. = zext i1 %cmp to i32 37 ret i32 %. 38} 39 40declare void @fn3(i32 %p1, i32 %p2, i32 %p3, i32 %p4) #0 41 42attributes #0 = { nounwind } 43