1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; PR1135 3; RUN: llc %s -o - | FileCheck %s 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 6target triple = "x86_64-apple-darwin10.3" 7 8define void @test(ptr nocapture %array, i32 %r0) nounwind ssp noredzone { 9; CHECK-LABEL: test: 10; CHECK: ## %bb.0: ## %bb.nph 11; CHECK-NEXT: movb $32, %al 12; CHECK-NEXT: xorl %ecx, %ecx 13; CHECK-NEXT: xorl %edx, %edx 14; CHECK-NEXT: xorl %r8d, %r8d 15; CHECK-NEXT: .p2align 4 16; CHECK-NEXT: LBB0_1: ## %bb 17; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 18; CHECK-NEXT: cmpb $4, %r8b 19; CHECK-NEXT: movzbl %r8b, %r8d 20; CHECK-NEXT: cmovgel %ecx, %r8d 21; CHECK-NEXT: sete %r9b 22; CHECK-NEXT: addb %r9b, %dl 23; CHECK-NEXT: leal (,%rdx,4), %r9d 24; CHECK-NEXT: addb %r8b, %r9b 25; CHECK-NEXT: shlb $2, %r9b 26; CHECK-NEXT: movzbl %r9b, %r9d 27; CHECK-NEXT: movl %esi, (%rdi,%r9,4) 28; CHECK-NEXT: movl %esi, 8(%rdi,%r9,4) 29; CHECK-NEXT: movl %esi, 4(%rdi,%r9,4) 30; CHECK-NEXT: movl %esi, 12(%rdi,%r9,4) 31; CHECK-NEXT: incb %r8b 32; CHECK-NEXT: decb %al 33; CHECK-NEXT: jne LBB0_1 34; CHECK-NEXT: ## %bb.2: ## %return 35; CHECK-NEXT: retq 36bb.nph: 37 br label %bb 38 39bb: ; preds = %bb, %bb.nph 40 %j.010 = phi i8 [ 0, %bb.nph ], [ %14, %bb ] ; <i8> [#uses=1] 41 %k.19 = phi i8 [ 0, %bb.nph ], [ %.k.1, %bb ] ; <i8> [#uses=1] 42 %i0.08 = phi i8 [ 0, %bb.nph ], [ %15, %bb ] ; <i8> [#uses=3] 43 %0 = icmp slt i8 %i0.08, 4 ; <i1> [#uses=1] 44 %iftmp.0.0 = select i1 %0, i8 %i0.08, i8 0 ; <i8> [#uses=2] 45 %1 = icmp eq i8 %i0.08, 4 ; <i1> [#uses=1] 46 %2 = zext i1 %1 to i8 ; <i8> [#uses=1] 47 %.k.1 = add i8 %2, %k.19 ; <i8> [#uses=2] 48 %3 = shl i8 %.k.1, 2 ; <i8> [#uses=1] 49 %4 = add i8 %3, %iftmp.0.0 ; <i8> [#uses=1] 50 %5 = shl i8 %4, 2 ; <i8> [#uses=1] 51 %6 = zext i8 %5 to i64 ; <i64> [#uses=4] 52 %7 = getelementptr inbounds i32, ptr %array, i64 %6 ; <ptr> [#uses=1] 53 store i32 %r0, ptr %7, align 4 54 %8 = or i64 %6, 2 ; <i64> [#uses=1] 55 %9 = getelementptr inbounds i32, ptr %array, i64 %8 ; <ptr> [#uses=1] 56 store i32 %r0, ptr %9, align 4 57 %10 = or i64 %6, 1 ; <i64> [#uses=1] 58 %11 = getelementptr inbounds i32, ptr %array, i64 %10 ; <ptr> [#uses=1] 59 store i32 %r0, ptr %11, align 4 60 %12 = or i64 %6, 3 ; <i64> [#uses=1] 61 %13 = getelementptr inbounds i32, ptr %array, i64 %12 ; <ptr> [#uses=1] 62 store i32 %r0, ptr %13, align 4 63 %14 = add nsw i8 %j.010, 1 ; <i8> [#uses=2] 64 %15 = add i8 %iftmp.0.0, 1 ; <i8> [#uses=1] 65 %exitcond = icmp eq i8 %14, 32 ; <i1> [#uses=1] 66 br i1 %exitcond, label %return, label %bb 67 68return: ; preds = %bb 69 ret void 70} 71 72define void @test1(ptr nocapture %array, i32 %r0, i8 signext %k, i8 signext %i0) nounwind { 73; CHECK-LABEL: test1: 74; CHECK: ## %bb.0: ## %bb.nph 75; CHECK-NEXT: ## kill: def $ecx killed $ecx def $rcx 76; CHECK-NEXT: movb $32, %al 77; CHECK-NEXT: xorl %r8d, %r8d 78; CHECK-NEXT: .p2align 4 79; CHECK-NEXT: LBB1_1: ## %for.body 80; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 81; CHECK-NEXT: cmpb $4, %cl 82; CHECK-NEXT: movzbl %cl, %ecx 83; CHECK-NEXT: cmovgel %r8d, %ecx 84; CHECK-NEXT: sete %r9b 85; CHECK-NEXT: addb %r9b, %dl 86; CHECK-NEXT: leal (,%rcx,4), %r9d 87; CHECK-NEXT: movl %edx, %r10d 88; CHECK-NEXT: shlb $4, %r10b 89; CHECK-NEXT: addb %r9b, %r10b 90; CHECK-NEXT: movzbl %r10b, %r9d 91; CHECK-NEXT: movl %esi, (%rdi,%r9,4) 92; CHECK-NEXT: movl %esi, 8(%rdi,%r9,4) 93; CHECK-NEXT: movl %esi, 4(%rdi,%r9,4) 94; CHECK-NEXT: movl %esi, 12(%rdi,%r9,4) 95; CHECK-NEXT: incb %cl 96; CHECK-NEXT: decb %al 97; CHECK-NEXT: jne LBB1_1 98; CHECK-NEXT: ## %bb.2: ## %for.end 99; CHECK-NEXT: retq 100bb.nph: 101 br label %for.body 102 103for.body: ; preds = %for.body, %bb.nph 104 %j.065 = phi i8 [ 0, %bb.nph ], [ %inc52, %for.body ] ; <i8> [#uses=1] 105 %i0.addr.064 = phi i8 [ %i0, %bb.nph ], [ %add, %for.body ] ; <i8> [#uses=3] 106 %k.addr.163 = phi i8 [ %k, %bb.nph ], [ %inc.k.addr.1, %for.body ] ; <i8> [#uses=1] 107 %cmp5 = icmp slt i8 %i0.addr.064, 4 ; <i1> [#uses=1] 108 %cond = select i1 %cmp5, i8 %i0.addr.064, i8 0 ; <i8> [#uses=2] 109 %cmp12 = icmp eq i8 %i0.addr.064, 4 ; <i1> [#uses=1] 110 %inc = zext i1 %cmp12 to i8 ; <i8> [#uses=1] 111 %inc.k.addr.1 = add i8 %inc, %k.addr.163 ; <i8> [#uses=2] 112 %mul = shl i8 %cond, 2 ; <i8> [#uses=1] 113 %mul22 = shl i8 %inc.k.addr.1, 4 ; <i8> [#uses=1] 114 %add23 = add i8 %mul22, %mul ; <i8> [#uses=1] 115 %idxprom = zext i8 %add23 to i64 ; <i64> [#uses=4] 116 %arrayidx = getelementptr inbounds i32, ptr %array, i64 %idxprom ; <ptr> [#uses=1] 117 store i32 %r0, ptr %arrayidx 118 %add3356 = or i64 %idxprom, 2 ; <i64> [#uses=1] 119 %arrayidx36 = getelementptr inbounds i32, ptr %array, i64 %add3356 ; <ptr> [#uses=1] 120 store i32 %r0, ptr %arrayidx36 121 %add4058 = or i64 %idxprom, 1 ; <i64> [#uses=1] 122 %arrayidx43 = getelementptr inbounds i32, ptr %array, i64 %add4058 ; <ptr> [#uses=1] 123 store i32 %r0, ptr %arrayidx43 124 %add4760 = or i64 %idxprom, 3 ; <i64> [#uses=1] 125 %arrayidx50 = getelementptr inbounds i32, ptr %array, i64 %add4760 ; <ptr> [#uses=1] 126 store i32 %r0, ptr %arrayidx50 127 %inc52 = add nsw i8 %j.065, 1 ; <i8> [#uses=2] 128 %add = add i8 %cond, 1 ; <i8> [#uses=1] 129 %exitcond = icmp eq i8 %inc52, 32 ; <i1> [#uses=1] 130 br i1 %exitcond, label %for.end, label %for.body 131 132for.end: ; preds = %for.body 133 ret void 134} 135