1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64-unknown-unknown %s -o - | FileCheck %s 3 4; Tests similar with "clang/test/CodeGen/ms-inline-asm-variables.c" 5; // clang -fasm-blocks -target x86_64-unknown-unknown -S 6 7; int gVar; 8; void t1() { 9; __asm add eax, dword ptr gVar[rax] 10; __asm add dword ptr [rax+gVar], eax 11; __asm add ebx, dword ptr gVar[271 - 82 + 81 + rbx] 12; __asm add dword ptr [rbx + gVar + 828], ebx 13; __asm add ecx, dword ptr gVar[4590 + rcx + rcx*4] 14; __asm add dword ptr [gVar + rcx + 45 + 23 - 53 + 60 - 2 + rcx*8], ecx 15; __asm add 1 + 1 + 2 + 3[gVar + rcx + rbx], eax 16; 17; gVar += 2; 18; } 19; 20; void t2(void) { 21; int lVar; 22; __asm mov eax, dword ptr lVar[rax] 23; __asm mov dword ptr [rax+lVar], eax 24; __asm mov ebx, dword ptr lVar[271 - 82 + 81 + rbx] 25; __asm mov dword ptr [rbx + lVar + 828], ebx 26; __asm mov 5 + 8 + 13 + 21[lVar + rbx], eax 27; } 28 29@gVar = dso_local global i32 0, align 4 30 31; Function Attrs: noinline nounwind optnone uwtable 32define dso_local void @t1() #0 { 33; CHECK-LABEL: t1: 34; CHECK: # %bb.0: # %entry 35; CHECK-NEXT: pushq %rbp 36; CHECK-NEXT: .cfi_def_cfa_offset 16 37; CHECK-NEXT: .cfi_offset %rbp, -16 38; CHECK-NEXT: movq %rsp, %rbp 39; CHECK-NEXT: .cfi_def_cfa_register %rbp 40; CHECK-NEXT: pushq %rbx 41; CHECK-NEXT: .cfi_offset %rbx, -24 42; CHECK-NEXT: #APP 43; CHECK-EMPTY: 44; CHECK-NEXT: addl gVar(,%rax), %eax 45; CHECK-NEXT: addl %eax, gVar(,%rax) 46; CHECK-NEXT: addl gVar+270(,%rbx), %ebx 47; CHECK-NEXT: addl %ebx, gVar+828(,%rbx) 48; CHECK-NEXT: addl gVar+4590(%rcx,%rcx,4), %ecx 49; CHECK-NEXT: addl %ecx, gVar+73(%rcx,%rcx,8) 50; CHECK-NEXT: addl %eax, gVar+7(%rcx,%rbx) 51; CHECK-EMPTY: 52; CHECK-NEXT: #NO_APP 53; CHECK-NEXT: movl gVar, %eax 54; CHECK-NEXT: addl $2, %eax 55; CHECK-NEXT: movl %eax, gVar 56; CHECK-NEXT: popq %rbx 57; CHECK-NEXT: popq %rbp 58; CHECK-NEXT: .cfi_def_cfa %rsp, 8 59; CHECK-NEXT: retq 60entry: 61 call void asm sideeffect inteldialect "add eax, dword ptr $4[rax]\0A\09add dword ptr $0[rax], eax\0A\09add ebx, dword ptr $5[rbx + $$270]\0A\09add dword ptr $1[rbx + $$828], ebx\0A\09add ecx, dword ptr ${6:P}[rcx + rcx * $$4 + $$4590]\0A\09add dword ptr ${2:P}[rcx + rcx * $$8 + $$73], ecx\0A\09add ${3:P}[rcx + rbx + $$7], eax", "=*m,=*m,=*m,=*m,*m,*m,*m,~{eax},~{ebx},~{ecx},~{flags},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar) #1 62 %0 = load i32, ptr @gVar, align 4 63 %add = add nsw i32 %0, 2 64 store i32 %add, ptr @gVar, align 4 65 ret void 66} 67 68; Function Attrs: noinline nounwind optnone uwtable 69define dso_local void @t2() #0 { 70; CHECK-LABEL: t2: 71; CHECK: # %bb.0: # %entry 72; CHECK-NEXT: pushq %rbp 73; CHECK-NEXT: .cfi_def_cfa_offset 16 74; CHECK-NEXT: .cfi_offset %rbp, -16 75; CHECK-NEXT: movq %rsp, %rbp 76; CHECK-NEXT: .cfi_def_cfa_register %rbp 77; CHECK-NEXT: pushq %rbx 78; CHECK-NEXT: .cfi_offset %rbx, -24 79; CHECK-NEXT: #APP 80; CHECK-EMPTY: 81; CHECK-NEXT: movl -12(%rbp,%rax), %eax 82; CHECK-NEXT: movl %eax, -12(%rbp,%rax) 83; CHECK-NEXT: movl 258(%rbp,%rbx), %ebx 84; CHECK-NEXT: movl %ebx, 816(%rbp,%rbx) 85; CHECK-NEXT: movl %eax, 35(%rbp,%rbx) 86; CHECK-EMPTY: 87; CHECK-NEXT: #NO_APP 88; CHECK-NEXT: popq %rbx 89; CHECK-NEXT: popq %rbp 90; CHECK-NEXT: .cfi_def_cfa %rsp, 8 91; CHECK-NEXT: retq 92entry: 93 %lVar = alloca i32, align 4 94 call void asm sideeffect inteldialect "mov eax, dword ptr $3[rax]\0A\09mov dword ptr $0[rax], eax\0A\09mov ebx, dword ptr $4[rbx + $$270]\0A\09mov dword ptr $1[rbx + $$828], ebx\0A\09mov $2[rbx + $$47], eax", "=*m,=*m,=*m,*m,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar) #1 95 ret void 96} 97 98attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } 99attributes #1 = { nounwind } 100 101!llvm.module.flags = !{!0, !1} 102 103!0 = !{i32 1, !"wchar_size", i32 4} 104!1 = !{i32 7, !"uwtable", i32 2} 105