xref: /llvm-project/llvm/test/CodeGen/X86/memset-2.ll (revision 754d25844a7e5793b1b6523ce223061dba7da7c1)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=i386-apple-darwin9 -mcpu=yonah < %s | FileCheck %s
3
4define fastcc void @t1(ptr nocapture %s) nounwind {
5; CHECK-LABEL: t1:
6; CHECK:       ## %bb.0: ## %entry
7; CHECK-NEXT:    subl $16, %esp
8; CHECK-NEXT:    pushl $188
9; CHECK-NEXT:    pushl $0
10; CHECK-NEXT:    pushl %ecx
11; CHECK-NEXT:    calll _memset
12; CHECK-NEXT:    addl $16, %esp
13; CHECK-NEXT:    ud2
14entry:
15  call void @llvm.memset.p0.i32(ptr %s, i8 0, i32 188, i1 false)
16  unreachable
17}
18
19define fastcc void @t2(ptr nocapture %s, i8 signext %c) nounwind {
20; CHECK-LABEL: t2:
21; CHECK:       ## %bb.0: ## %entry
22; CHECK-NEXT:    subl $16, %esp
23; CHECK-NEXT:    pushl $76
24; CHECK-NEXT:    pushl %edx
25; CHECK-NEXT:    pushl %ecx
26; CHECK-NEXT:    calll _memset
27; CHECK-NEXT:    addl $16, %esp
28; CHECK-NEXT:    ud2
29entry:
30  call void @llvm.memset.p0.i32(ptr %s, i8 %c, i32 76, i1 false)
31  unreachable
32}
33
34declare void @llvm.memset.p0.i32(ptr nocapture, i8, i32, i1) nounwind
35
36define void @t3(ptr nocapture %s, i8 %a) nounwind {
37; CHECK-LABEL: t3:
38; CHECK:       ## %bb.0: ## %entry
39; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
40; CHECK-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
41; CHECK-NEXT:    imull $16843009, %ecx, %ecx ## imm = 0x1010101
42; CHECK-NEXT:    movl %ecx, 4(%eax)
43; CHECK-NEXT:    movl %ecx, (%eax)
44; CHECK-NEXT:    retl
45entry:
46  tail call void @llvm.memset.p0.i32(ptr %s, i8 %a, i32 8, i1 false)
47  ret void
48}
49
50define void @t4(ptr nocapture %s, i8 %a) nounwind {
51; CHECK-LABEL: t4:
52; CHECK:       ## %bb.0: ## %entry
53; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
54; CHECK-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
55; CHECK-NEXT:    imull $16843009, %ecx, %ecx ## imm = 0x1010101
56; CHECK-NEXT:    movl %ecx, 11(%eax)
57; CHECK-NEXT:    movl %ecx, 8(%eax)
58; CHECK-NEXT:    movl %ecx, 4(%eax)
59; CHECK-NEXT:    movl %ecx, (%eax)
60; CHECK-NEXT:    retl
61entry:
62  tail call void @llvm.memset.p0.i32(ptr %s, i8 %a, i32 15, i1 false)
63  ret void
64}
65