xref: /llvm-project/llvm/test/CodeGen/X86/large-constants.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-darwin -mcpu=corei7 | FileCheck %s
3
4define i64 @constant_hoisting(i64 %o0, i64 %o1, i64 %o2, i64 %o3, i64 %o4, i64 %o5) {
5; CHECK-LABEL: constant_hoisting:
6; CHECK:       ## %bb.0: ## %entry
7; CHECK-NEXT:    movabsq $-281474976710654, %rax ## imm = 0xFFFF000000000002
8; CHECK-NEXT:    testq %rax, %rdi
9; CHECK-NEXT:    jne LBB0_7
10; CHECK-NEXT:  ## %bb.1: ## %bb1
11; CHECK-NEXT:    testq %rax, %rsi
12; CHECK-NEXT:    jne LBB0_7
13; CHECK-NEXT:  ## %bb.2: ## %bb2
14; CHECK-NEXT:    testq %rax, %rdx
15; CHECK-NEXT:    jne LBB0_7
16; CHECK-NEXT:  ## %bb.3: ## %bb3
17; CHECK-NEXT:    testq %rax, %rcx
18; CHECK-NEXT:    jne LBB0_7
19; CHECK-NEXT:  ## %bb.4: ## %bb4
20; CHECK-NEXT:    leaq 1(%rax), %rcx
21; CHECK-NEXT:    testq %rcx, %r8
22; CHECK-NEXT:    jne LBB0_7
23; CHECK-NEXT:  ## %bb.5: ## %bb5
24; CHECK-NEXT:    addq $2, %rax
25; CHECK-NEXT:    andq %rax, %r9
26; CHECK-NEXT:    je LBB0_6
27; CHECK-NEXT:  LBB0_7: ## %fail
28; CHECK-NEXT:    movq $-1, %rax
29; CHECK-NEXT:    retq
30; CHECK-NEXT:  LBB0_6: ## %bb6
31; CHECK-NEXT:    movq %r9, %rax
32; CHECK-NEXT:    retq
33entry:
34  %l0 = and i64 %o0, -281474976710654
35  %c0 = icmp ne i64 %l0, 0
36  br i1 %c0, label %fail, label %bb1
37
38bb1:
39  %l1 = and i64 %o1, -281474976710654
40  %c1 = icmp ne i64 %l1, 0
41  br i1 %c1, label %fail, label %bb2
42
43bb2:
44  %l2 = and i64 %o2, -281474976710654
45  %c2 = icmp ne i64 %l2, 0
46  br i1 %c2, label %fail, label %bb3
47
48bb3:
49  %l3 = and i64 %o3, -281474976710654
50  %c3 = icmp ne i64 %l3, 0
51  br i1 %c3, label %fail, label %bb4
52
53bb4:
54  %l4 = and i64 %o4, -281474976710653
55  %c4 = icmp ne i64 %l4, 0
56  br i1 %c4, label %fail, label %bb5
57
58bb5:
59  %l5 = and i64 %o5, -281474976710652
60  %c5 = icmp ne i64 %l5, 0
61  br i1 %c5, label %fail, label %bb6
62
63bb6:
64  ret i64 %l5
65
66fail:
67  ret i64 -1
68}
69
70define void @constant_expressions() {
71; CHECK-LABEL: constant_expressions:
72; CHECK:       ## %bb.0: ## %entry
73; CHECK-NEXT:    movabsq $51250129900, %rax ## imm = 0xBEEBEEBEC
74; CHECK-NEXT:    movq (%rax), %rcx
75; CHECK-NEXT:    movq 16(%rax), %rdx
76; CHECK-NEXT:    addq 8(%rax), %rcx
77; CHECK-NEXT:    addq 24(%rax), %rdx
78; CHECK-NEXT:    addq %rcx, %rdx
79; CHECK-NEXT:    movq %rdx, (%rax)
80; CHECK-NEXT:    retq
81entry:
82  %0 = load i64, ptr inttoptr (i64 add (i64 51250129900, i64 0) to ptr)
83  %1 = load i64, ptr inttoptr (i64 add (i64 51250129900, i64 8) to ptr)
84  %2 = load i64, ptr inttoptr (i64 add (i64 51250129900, i64 16) to ptr)
85  %3 = load i64, ptr inttoptr (i64 add (i64 51250129900, i64 24) to ptr)
86  %4 = add i64 %0, %1
87  %5 = add i64 %2, %3
88  %6 = add i64 %4, %5
89  store i64 %6, ptr inttoptr (i64 add (i64 51250129900, i64 0) to ptr)
90  ret void
91}
92
93
94define void @constant_expressions2() {
95; CHECK-LABEL: constant_expressions2:
96; CHECK:       ## %bb.0: ## %entry
97; CHECK-NEXT:    movabsq $51250129900, %rax ## imm = 0xBEEBEEBEC
98; CHECK-NEXT:    movq (%rax), %rcx
99; CHECK-NEXT:    movq 16(%rax), %rdx
100; CHECK-NEXT:    addq 8(%rax), %rcx
101; CHECK-NEXT:    addq 24(%rax), %rdx
102; CHECK-NEXT:    addq %rcx, %rdx
103; CHECK-NEXT:    movq %rdx, (%rax)
104; CHECK-NEXT:    retq
105entry:
106  %0 = load i64, ptr inttoptr (i64 51250129900 to ptr)
107  %1 = load i64, ptr inttoptr (i64 51250129908 to ptr)
108  %2 = load i64, ptr inttoptr (i64 51250129916 to ptr)
109  %3 = load i64, ptr inttoptr (i64 51250129924 to ptr)
110  %4 = add i64 %0, %1
111  %5 = add i64 %2, %3
112  %6 = add i64 %4, %5
113  store i64 %6, ptr inttoptr (i64 51250129900 to ptr)
114  ret void
115}
116
117