1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc -mtriple=x86_64-unknown-freebsd15.0 < %s | FileCheck %s 3 4%struct.anon.5.28.78.99.149.119 = type { [4 x i8] } 5 6@vga_load_state_p = external dso_local global ptr, align 8 7@vga_load_state_data = external dso_local global i8, align 1 8 9define dso_local void @vga_load_state() #0 { 10; CHECK-LABEL: vga_load_state: 11; CHECK: # %bb.0: # %entry 12; CHECK-NEXT: movl $0, -{{[0-9]+}}(%rsp) 13; CHECK-NEXT: cmpl $3, -{{[0-9]+}}(%rsp) 14; CHECK-NEXT: jg .LBB0_3 15; CHECK-NEXT: .p2align 4 16; CHECK-NEXT: .LBB0_2: # %for.body 17; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 18; CHECK-NEXT: xorl %eax, %eax 19; CHECK-NEXT: #APP 20; CHECK-NEXT: #NO_APP 21; CHECK-NEXT: incl -{{[0-9]+}}(%rsp) 22; CHECK-NEXT: cmpl $3, -{{[0-9]+}}(%rsp) 23; CHECK-NEXT: jle .LBB0_2 24; CHECK-NEXT: .LBB0_3: # %for.end 25; CHECK-NEXT: movl $0, -{{[0-9]+}}(%rsp) 26; CHECK-NEXT: .p2align 4 27; CHECK-NEXT: .LBB0_4: # %for.cond1 28; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 29; CHECK-NEXT: #APP 30; CHECK-NEXT: #NO_APP 31; CHECK-NEXT: movq vga_load_state_p(%rip), %rax 32; CHECK-NEXT: movslq -{{[0-9]+}}(%rsp), %rcx 33; CHECK-NEXT: movzbl (%rax,%rcx), %eax 34; CHECK-NEXT: movb %al, vga_load_state_data(%rip) 35; CHECK-NEXT: leal 1(%rcx), %eax 36; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 37; CHECK-NEXT: jmp .LBB0_4 38entry: 39 %i = alloca i32, align 4 40 store i32 0, ptr %i, align 4 41 br label %for.cond 42 43for.cond: ; preds = %for.body, %entry 44 %i1 = load i32, ptr %i, align 4 45 %cmp = icmp slt i32 %i1, 4 46 br i1 %cmp, label %for.body, label %for.end 47 48for.body: ; preds = %for.cond 49 call void asm sideeffect "", "{ax},~{dirflag},~{fpsr},~{flags}"(i8 0) #1 50 %i2 = load i32, ptr %i, align 4 51 %inc = add nsw i32 %i2, 1 52 store i32 %inc, ptr %i, align 4 53 br label %for.cond 54 55for.end: ; preds = %for.cond 56 store i32 0, ptr %i, align 4 57 br label %for.cond1 58 59for.cond1: ; preds = %for.cond1, %for.end 60 call void asm sideeffect "", "N{dx},~{dirflag},~{fpsr},~{flags}"(i32 poison) #1 61 %i3 = load ptr, ptr @vga_load_state_p, align 8 62 %regs = getelementptr inbounds %struct.anon.5.28.78.99.149.119, ptr %i3, i32 0, i32 0 63 %i4 = load i32, ptr %i, align 4 64 %idxprom = sext i32 %i4 to i64 65 %arrayidx = getelementptr inbounds [4 x i8], ptr %regs, i64 0, i64 %idxprom 66 %i5 = load i8, ptr %arrayidx, align 1 67 store i8 %i5, ptr @vga_load_state_data, align 1 68 %i6 = load i32, ptr %i, align 4 69 %inc5 = add nsw i32 %i6, 1 70 store i32 %inc5, ptr %i, align 4 71 br label %for.cond1, !llvm.loop !0 72} 73 74attributes #0 = { "tune-cpu"="generic" } 75attributes #1 = { nounwind } 76 77!0 = distinct !{!0, !1} 78!1 = !{!"llvm.loop.mustprogress"} 79