1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -no-integrated-as | FileCheck %s 3; PR2094 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" 6target triple = "x86_64-apple-darwin8" 7 8define i32 @test1(ptr %v, ptr %blk2, ptr %blk1, i32 %stride, i32 %h) nounwind { 9; CHECK-LABEL: test1: 10; CHECK: ## %bb.0: 11; CHECK-NEXT: movslq %ecx, %rax 12; CHECK-NEXT: ## InlineAsm Start 13; CHECK-NEXT: %eax %rcx %rdx %rax %r8d %rdx %rsi 14; CHECK-NEXT: ## InlineAsm End 15; CHECK-NEXT: ## InlineAsm Start 16; CHECK-NEXT: set %eax 17; CHECK-NEXT: ## InlineAsm End 18; CHECK-NEXT: retq 19 %tmp12 = sext i32 %stride to i64 ; <i64> [#uses=1] 20 %mrv = call {i32, ptr, ptr} asm sideeffect "$0 $1 $2 $3 $4 $5 $6", 21 "=r,=r,=r,r,r,r,r"( i64 %tmp12, i32 %h, ptr %blk1, ptr %blk2 ) nounwind 22 %tmp6 = extractvalue {i32, ptr, ptr} %mrv, 0 23 %tmp7 = call i32 asm sideeffect "set $0", 24 "=r,~{dirflag},~{fpsr},~{flags}"( ) nounwind 25 ret i32 %tmp7 26} 27 28define <4 x float> @test2() nounwind { 29; CHECK-LABEL: test2: 30; CHECK: ## %bb.0: 31; CHECK-NEXT: ## InlineAsm Start 32; CHECK-NEXT: set %xmm0, %xmm1 33; CHECK-NEXT: ## InlineAsm End 34; CHECK-NEXT: addps %xmm1, %xmm0 35; CHECK-NEXT: retq 36 %mrv = call {<4 x float>, <4 x float>} asm "set $0, $1", "=x,=x"() 37 %a = extractvalue {<4 x float>, <4 x float>} %mrv, 0 38 %b = extractvalue {<4 x float>, <4 x float>} %mrv, 1 39 %c = fadd <4 x float> %a, %b 40 ret <4 x float> %c 41} 42 43define <4 x i32> @test3() nounwind { 44; CHECK-LABEL: test3: 45; CHECK: ## %bb.0: 46; CHECK-NEXT: ## InlineAsm Start 47; CHECK-NEXT: set %xmm0, %xmm1 48; CHECK-NEXT: ## InlineAsm End 49; CHECK-NEXT: paddd %xmm1, %xmm0 50; CHECK-NEXT: retq 51 %mrv = call {<4 x i32>, <4 x i32>} asm "set $0, $1", "=x,=x"() 52 %a = extractvalue {<4 x i32>, <4 x i32>} %mrv, 0 53 %b = extractvalue {<4 x i32>, <4 x i32>} %mrv, 1 54 %c = add <4 x i32> %a, %b 55 ret <4 x i32> %c 56} 57 58