1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s --check-prefix=X86ASM 3 4%struct.T = type { i32, i32 } 5 6define i32 @freeze_int() { 7; X86ASM-LABEL: freeze_int: 8; X86ASM: # %bb.0: 9; X86ASM-NEXT: imull %eax, %eax 10; X86ASM-NEXT: retq 11 %y1 = freeze i32 undef 12 %t1 = mul i32 %y1, %y1 13 ret i32 %t1 14} 15 16define i5 @freeze_int2() { 17; X86ASM-LABEL: freeze_int2: 18; X86ASM: # %bb.0: 19; X86ASM-NEXT: mulb %al 20; X86ASM-NEXT: retq 21 %y1 = freeze i5 undef 22 %t1 = mul i5 %y1, %y1 23 ret i5 %t1 24} 25 26define float @freeze_float() { 27; X86ASM-LABEL: freeze_float: 28; X86ASM: # %bb.0: 29; X86ASM-NEXT: addss %xmm0, %xmm0 30; X86ASM-NEXT: retq 31 %y1 = freeze float undef 32 %t1 = fadd float %y1, %y1 33 ret float %t1 34} 35 36define half @freeze_half() { 37; X86ASM-LABEL: freeze_half: 38; X86ASM: # %bb.0: 39; X86ASM-NEXT: pushq %rax 40; X86ASM-NEXT: .cfi_def_cfa_offset 16 41; X86ASM-NEXT: callq __extendhfsf2@PLT 42; X86ASM-NEXT: addss %xmm0, %xmm0 43; X86ASM-NEXT: callq __truncsfhf2@PLT 44; X86ASM-NEXT: popq %rax 45; X86ASM-NEXT: .cfi_def_cfa_offset 8 46; X86ASM-NEXT: retq 47 %y1 = freeze half undef 48 %t1 = fadd half %y1, %y1 49 ret half %t1 50} 51 52define <2 x i32> @freeze_ivec() { 53; X86ASM-LABEL: freeze_ivec: 54; X86ASM: # %bb.0: 55; X86ASM-NEXT: paddd %xmm0, %xmm0 56; X86ASM-NEXT: retq 57 %y1 = freeze <2 x i32> undef 58 %t1 = add <2 x i32> %y1, %y1 59 ret <2 x i32> %t1 60} 61 62define ptr @freeze_ptr() { 63; X86ASM-LABEL: freeze_ptr: 64; X86ASM: # %bb.0: 65; X86ASM-NEXT: addq $4, %rax 66; X86ASM-NEXT: retq 67 %y1 = freeze ptr undef 68 %t1 = getelementptr i8, ptr %y1, i64 4 69 ret ptr %t1 70} 71 72define i32 @freeze_struct() { 73; X86ASM-LABEL: freeze_struct: 74; X86ASM: # %bb.0: 75; X86ASM-NEXT: addl %eax, %eax 76; X86ASM-NEXT: retq 77 %y1 = freeze %struct.T undef 78 %v1 = extractvalue %struct.T %y1, 0 79 %v2 = extractvalue %struct.T %y1, 1 80 %t1 = add i32 %v1, %v2 81 ret i32 %t1 82} 83 84define i32 @freeze_anonstruct() { 85; X86ASM-LABEL: freeze_anonstruct: 86; X86ASM: # %bb.0: 87; X86ASM-NEXT: addl %eax, %eax 88; X86ASM-NEXT: retq 89 %y1 = freeze {i32, i32} undef 90 %v1 = extractvalue {i32, i32} %y1, 0 91 %v2 = extractvalue {i32, i32} %y1, 1 92 %t1 = add i32 %v1, %v2 93 ret i32 %t1 94} 95 96define i32 @freeze_anonstruct2() { 97; X86ASM-LABEL: freeze_anonstruct2: 98; X86ASM: # %bb.0: 99; X86ASM-NEXT: movzwl %ax, %eax 100; X86ASM-NEXT: addl %eax, %eax 101; X86ASM-NEXT: retq 102 %y1 = freeze {i32, i16} undef 103 %v1 = extractvalue {i32, i16} %y1, 0 104 %v2 = extractvalue {i32, i16} %y1, 1 105 %z2 = zext i16 %v2 to i32 106 %t1 = add i32 %v1, %z2 107 ret i32 %t1 108} 109 110define i64 @freeze_array() { 111; X86ASM-LABEL: freeze_array: 112; X86ASM: # %bb.0: 113; X86ASM-NEXT: addq %rax, %rax 114; X86ASM-NEXT: retq 115 %y1 = freeze [2 x i64] undef 116 %v1 = extractvalue [2 x i64] %y1, 0 117 %v2 = extractvalue [2 x i64] %y1, 1 118 %t1 = add i64 %v1, %v2 119 ret i64 %t1 120} 121 122; Make sure we emit a movl to zext the input before the imulq. This previously 123; failed because freeze was not listed in the instructions that don't zext their 124; result in the def32 pattern X86InstrCompiler.td. 125define i32 @freeze_zext(i64 %a) nounwind { 126; X86ASM-LABEL: freeze_zext: 127; X86ASM: # %bb.0: # %entry 128; X86ASM-NEXT: movq %rdi, %rax 129; X86ASM-NEXT: movl %eax, %ecx 130; X86ASM-NEXT: movl $3435973837, %edx # imm = 0xCCCCCCCD 131; X86ASM-NEXT: imulq %rcx, %rdx 132; X86ASM-NEXT: shrq $35, %rdx 133; X86ASM-NEXT: addl %edx, %edx 134; X86ASM-NEXT: leal (%rdx,%rdx,4), %ecx 135; X86ASM-NEXT: subl %ecx, %eax 136; X86ASM-NEXT: # kill: def $eax killed $eax killed $rax 137; X86ASM-NEXT: retq 138entry: 139 %x = trunc i64 %a to i32 140 %y = freeze i32 %x 141 %z = urem i32 %y, 10 142 ret i32 %z 143} 144