1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin -O0 | FileCheck %s 3 4; Make sure we only use the less significant bit of the value that feeds the 5; select. Otherwise, we may account for a non-zero value whereas the 6; lsb is zero. 7; <rdar://problem/15651765> 8 9define i32 @fastisel_select(i1 %exchSub2211_, i1 %trunc_8766) { 10; CHECK-LABEL: fastisel_select: 11; CHECK: ## %bb.0: 12; CHECK-NEXT: movb %sil, %al 13; CHECK-NEXT: movb %dil, %dl 14; CHECK-NEXT: subb %al, %dl 15; CHECK-NEXT: xorl %eax, %eax 16; CHECK-NEXT: movl $1204476887, %ecx ## imm = 0x47CADBD7 17; CHECK-NEXT: testb $1, %dl 18; CHECK-NEXT: cmovnel %ecx, %eax 19; CHECK-NEXT: retq 20 %shuffleInternal15257_8932 = sub i1 %exchSub2211_, %trunc_8766 21 %counter_diff1345 = select i1 %shuffleInternal15257_8932, i32 1204476887, i32 0 22 ret i32 %counter_diff1345 23} 24 25