xref: /llvm-project/llvm/test/CodeGen/X86/extmul64.ll (revision 584ed8822631481ced8d3574cc1fed1585aed77d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-- | FileCheck %s
3
4define i64 @i32_sext_i64(i32 %a, i32 %b) {
5; CHECK-LABEL: i32_sext_i64:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
8; CHECK-NEXT:    imull {{[0-9]+}}(%esp)
9; CHECK-NEXT:    retl
10  %aa = sext i32 %a to i64
11  %bb = sext i32 %b to i64
12  %cc = mul i64 %aa, %bb
13  ret i64 %cc
14}
15define i64 @i32_zext_i64(i32 %a, i32 %b) {
16; CHECK-LABEL: i32_zext_i64:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
19; CHECK-NEXT:    mull {{[0-9]+}}(%esp)
20; CHECK-NEXT:    retl
21  %aa = zext i32 %a to i64
22  %bb = zext i32 %b to i64
23  %cc = mul i64 %aa, %bb
24  ret i64 %cc
25}
26