1; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s 2; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | llvm-mc -triple=x86_64-unknown-linux-gnu 3 4; Check that the X86 domain reassignment pass doesn't introduce an illegal 5; test instruction. See PR37396 6define void @japi1_foo2_34617(i1 %arg) { 7pass2: 8 br label %if5 9 10L174: 11 %tmp = icmp sgt <2 x i64> undef, zeroinitializer 12 %tmp1 = icmp sle <2 x i64> undef, undef 13 %tmp2 = and <2 x i1> %tmp, %tmp1 14 %tmp3 = extractelement <2 x i1> %tmp2, i32 0 15 %tmp4 = extractelement <2 x i1> %tmp2, i32 1 16 %tmp106 = and i1 %tmp4, %tmp3 17 %tmp107 = zext i1 %tmp106 to i8 18 %tmp108 = and i8 %tmp122, %tmp107 19 %tmp109 = icmp eq i8 %tmp108, 0 20; CHECK-NOT: testb {{%k[0-7]}} 21 br i1 %tmp109, label %L188, label %L190 22 23if5: 24 %b.055 = phi i8 [ 1, %pass2 ], [ %tmp122, %if5 ] 25 %tmp118 = icmp sgt i64 undef, 0 26 %tmp119 = icmp sle i64 undef, undef 27 %tmp120 = and i1 %tmp118, %tmp119 28 %tmp121 = zext i1 %tmp120 to i8 29 %tmp122 = and i8 %b.055, %tmp121 30 br i1 %arg, label %L174, label %if5 31 32L188: 33 unreachable 34 35L190: 36 ret void 37} 38