xref: /llvm-project/llvm/test/CodeGen/X86/combine-adc.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
4
5define i32 @PR40483_add1(ptr, i32) nounwind {
6; X86-LABEL: PR40483_add1:
7; X86:       # %bb.0:
8; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
9; X86-NEXT:    movl (%ecx), %eax
10; X86-NEXT:    addl {{[0-9]+}}(%esp), %eax
11; X86-NEXT:    movl %eax, (%ecx)
12; X86-NEXT:    jae .LBB0_2
13; X86-NEXT:  # %bb.1:
14; X86-NEXT:    xorl %eax, %eax
15; X86-NEXT:  .LBB0_2:
16; X86-NEXT:    retl
17;
18; X64-LABEL: PR40483_add1:
19; X64:       # %bb.0:
20; X64-NEXT:    xorl %eax, %eax
21; X64-NEXT:    addl (%rdi), %esi
22; X64-NEXT:    movl %esi, (%rdi)
23; X64-NEXT:    cmovael %esi, %eax
24; X64-NEXT:    retq
25  %3 = load i32, ptr %0, align 8
26  %4 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %3, i32 %1)
27  %5 = extractvalue { i8, i32 } %4, 1
28  store i32 %5, ptr %0, align 8
29  %6 = extractvalue { i8, i32 } %4, 0
30  %7 = icmp eq i8 %6, 0
31  %8 = add i32 %1, %3
32  %9 = or i32 %5, %8
33  %10 = select i1 %7, i32 %9, i32 0
34  ret i32 %10
35}
36
37define i32 @PR40483_add2(ptr, i32) nounwind {
38; X86-LABEL: PR40483_add2:
39; X86:       # %bb.0:
40; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
41; X86-NEXT:    movl (%edx), %ecx
42; X86-NEXT:    xorl %eax, %eax
43; X86-NEXT:    addl {{[0-9]+}}(%esp), %ecx
44; X86-NEXT:    movl %ecx, (%edx)
45; X86-NEXT:    jae .LBB1_2
46; X86-NEXT:  # %bb.1:
47; X86-NEXT:    movl %ecx, %eax
48; X86-NEXT:  .LBB1_2:
49; X86-NEXT:    retl
50;
51; X64-LABEL: PR40483_add2:
52; X64:       # %bb.0:
53; X64-NEXT:    xorl %eax, %eax
54; X64-NEXT:    addl (%rdi), %esi
55; X64-NEXT:    movl %esi, (%rdi)
56; X64-NEXT:    cmovbl %esi, %eax
57; X64-NEXT:    retq
58  %3 = load i32, ptr %0, align 8
59  %4 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %3, i32 %1)
60  %5 = extractvalue { i8, i32 } %4, 1
61  store i32 %5, ptr %0, align 8
62  %6 = extractvalue { i8, i32 } %4, 0
63  %7 = icmp eq i8 %6, 0
64  %8 = add i32 %3, %1
65  %9 = or i32 %5, %8
66  %10 = select i1 %7, i32 0, i32 %9
67  ret i32 %10
68}
69
70define i32 @adc_merge_constants(i32 %a0) nounwind {
71; X86-LABEL: adc_merge_constants:
72; X86:       # %bb.0:
73; X86-NEXT:    xorl %eax, %eax
74; X86-NEXT:    btl $11, {{[0-9]+}}(%esp)
75; X86-NEXT:    adcl $54, %eax
76; X86-NEXT:    retl
77;
78; X64-LABEL: adc_merge_constants:
79; X64:       # %bb.0:
80; X64-NEXT:    xorl %eax, %eax
81; X64-NEXT:    btl $11, %edi
82; X64-NEXT:    adcl $54, %eax
83; X64-NEXT:    retq
84  %bit = lshr i32 %a0, 11
85  %mask = and i32 %bit, 1
86  %isz = trunc i32 %mask to i8
87  %adc = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 %isz, i32 55, i32 -1)
88  %sum = extractvalue { i8, i32 } %adc, 1
89  ret i32 %sum
90}
91
92declare { i8, i32 } @llvm.x86.addcarry.32(i8, i32, i32)
93