1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NO-NDD 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ndd -show-mc-encoding | FileCheck --check-prefixes=CHECK,NDD %s 4 5@d = dso_local global i8 0, align 1 6@d64 = dso_local global i64 0 7 8define i32 @test1(i32 %X, ptr %y) nounwind { 9; CHECK-LABEL: test1: 10; CHECK: # %bb.0: # %entry 11; CHECK-NEXT: cmpl $0, (%rsi) # encoding: [0x83,0x3e,0x00] 12; CHECK-NEXT: je .LBB0_2 # encoding: [0x74,A] 13; CHECK-NEXT: # fixup A - offset: 1, value: .LBB0_2-1, kind: FK_PCRel_1 14; CHECK-NEXT: # %bb.1: # %cond_true 15; CHECK-NEXT: movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00] 16; CHECK-NEXT: retq # encoding: [0xc3] 17; CHECK-NEXT: .LBB0_2: # %ReturnBlock 18; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 19; CHECK-NEXT: retq # encoding: [0xc3] 20entry: 21 %tmp = load i32, ptr %y 22 %tmp.upgrd.1 = icmp eq i32 %tmp, 0 23 br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true 24 25cond_true: 26 ret i32 1 27 28ReturnBlock: 29 ret i32 0 30} 31 32define i32 @test2(i32 %X, ptr %y) nounwind { 33; CHECK-LABEL: test2: 34; CHECK: # %bb.0: # %entry 35; CHECK-NEXT: testl $536870911, (%rsi) # encoding: [0xf7,0x06,0xff,0xff,0xff,0x1f] 36; CHECK-NEXT: # imm = 0x1FFFFFFF 37; CHECK-NEXT: je .LBB1_2 # encoding: [0x74,A] 38; CHECK-NEXT: # fixup A - offset: 1, value: .LBB1_2-1, kind: FK_PCRel_1 39; CHECK-NEXT: # %bb.1: # %cond_true 40; CHECK-NEXT: movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00] 41; CHECK-NEXT: retq # encoding: [0xc3] 42; CHECK-NEXT: .LBB1_2: # %ReturnBlock 43; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 44; CHECK-NEXT: retq # encoding: [0xc3] 45entry: 46 %tmp = load i32, ptr %y 47 %tmp1 = shl i32 %tmp, 3 48 %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0 49 br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true 50 51cond_true: 52 ret i32 1 53 54ReturnBlock: 55 ret i32 0 56} 57 58define i8 @test2b(i8 %X, ptr %y) nounwind { 59; CHECK-LABEL: test2b: 60; CHECK: # %bb.0: # %entry 61; CHECK-NEXT: testb $31, (%rsi) # encoding: [0xf6,0x06,0x1f] 62; CHECK-NEXT: je .LBB2_2 # encoding: [0x74,A] 63; CHECK-NEXT: # fixup A - offset: 1, value: .LBB2_2-1, kind: FK_PCRel_1 64; CHECK-NEXT: # %bb.1: # %cond_true 65; CHECK-NEXT: movb $1, %al # encoding: [0xb0,0x01] 66; CHECK-NEXT: retq # encoding: [0xc3] 67; CHECK-NEXT: .LBB2_2: # %ReturnBlock 68; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 69; CHECK-NEXT: retq # encoding: [0xc3] 70entry: 71 %tmp = load i8, ptr %y 72 %tmp1 = shl i8 %tmp, 3 73 %tmp1.upgrd.2 = icmp eq i8 %tmp1, 0 74 br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true 75 76cond_true: 77 ret i8 1 78 79ReturnBlock: 80 ret i8 0 81} 82 83define i64 @test3(i64 %x) nounwind { 84; CHECK-LABEL: test3: 85; CHECK: # %bb.0: # %entry 86; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 87; CHECK-NEXT: testq %rdi, %rdi # encoding: [0x48,0x85,0xff] 88; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 89; CHECK-NEXT: retq # encoding: [0xc3] 90entry: 91 %t = icmp eq i64 %x, 0 92 %r = zext i1 %t to i64 93 ret i64 %r 94} 95 96define i64 @test4(i64 %x) nounwind { 97; CHECK-LABEL: test4: 98; CHECK: # %bb.0: 99; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 100; CHECK-NEXT: testq %rdi, %rdi # encoding: [0x48,0x85,0xff] 101; CHECK-NEXT: setle %al # encoding: [0x0f,0x9e,0xc0] 102; CHECK-NEXT: retq # encoding: [0xc3] 103 %t = icmp slt i64 %x, 1 104 %r = zext i1 %t to i64 105 ret i64 %r 106} 107 108define i32 @test5(double %A) nounwind { 109; CHECK-LABEL: test5: 110; CHECK: # %bb.0: # %entry 111; CHECK-NEXT: ucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A] 112; CHECK-NEXT: # fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte 113; CHECK-NEXT: ja .LBB5_3 # encoding: [0x77,A] 114; CHECK-NEXT: # fixup A - offset: 1, value: .LBB5_3-1, kind: FK_PCRel_1 115; CHECK-NEXT: # %bb.1: # %entry 116; CHECK-NEXT: ucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A] 117; CHECK-NEXT: # fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte 118; CHECK-NEXT: jb .LBB5_3 # encoding: [0x72,A] 119; CHECK-NEXT: # fixup A - offset: 1, value: .LBB5_3-1, kind: FK_PCRel_1 120; CHECK-NEXT: # %bb.2: # %bb12 121; CHECK-NEXT: movl $32, %eax # encoding: [0xb8,0x20,0x00,0x00,0x00] 122; CHECK-NEXT: retq # encoding: [0xc3] 123; CHECK-NEXT: .LBB5_3: # %bb8 124; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 125; CHECK-NEXT: jmp foo@PLT # TAILCALL 126; CHECK-NEXT: # encoding: [0xeb,A] 127; CHECK-NEXT: # fixup A - offset: 1, value: foo@PLT-1, kind: FK_PCRel_1 128entry: 129 %tmp2 = fcmp ogt double %A, 1.500000e+02 130 %tmp5 = fcmp ult double %A, 7.500000e+01 131 %bothcond = or i1 %tmp2, %tmp5 132 br i1 %bothcond, label %bb8, label %bb12 133 134bb8: 135 %tmp9 = tail call i32 (...) @foo() nounwind 136 ret i32 %tmp9 137 138bb12: 139 ret i32 32 140} 141 142declare i32 @foo(...) 143 144define i32 @test6() nounwind align 2 { 145; CHECK-LABEL: test6: 146; CHECK: # %bb.0: # %entry 147; CHECK-NEXT: cmpq $0, -{{[0-9]+}}(%rsp) # encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00] 148; CHECK-NEXT: je .LBB6_1 # encoding: [0x74,A] 149; CHECK-NEXT: # fixup A - offset: 1, value: .LBB6_1-1, kind: FK_PCRel_1 150; CHECK-NEXT: # %bb.2: # %F 151; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 152; CHECK-NEXT: retq # encoding: [0xc3] 153; CHECK-NEXT: .LBB6_1: # %T 154; CHECK-NEXT: movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00] 155; CHECK-NEXT: retq # encoding: [0xc3] 156entry: 157 %A = alloca { i64, i64 }, align 8 158 %B = getelementptr inbounds { i64, i64 }, ptr %A, i64 0, i32 1 159 %C = load i64, ptr %B 160 %D = icmp eq i64 %C, 0 161 br i1 %D, label %T, label %F 162 163T: 164 ret i32 1 165 166F: 167 ret i32 0 168} 169 170define i32 @test7(i64 %res) nounwind { 171; NO-NDD-LABEL: test7: 172; NO-NDD: # %bb.0: # %entry 173; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 174; NO-NDD-NEXT: shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20] 175; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 176; NO-NDD-NEXT: retq # encoding: [0xc3] 177; 178; NDD-LABEL: test7: 179; NDD: # %bb.0: # %entry 180; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 181; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20] 182; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 183; NDD-NEXT: retq # encoding: [0xc3] 184entry: 185 %lnot = icmp ult i64 %res, 4294967296 186 %lnot.ext = zext i1 %lnot to i32 187 ret i32 %lnot.ext 188} 189 190define i32 @test8(i64 %res) nounwind { 191; NO-NDD-LABEL: test8: 192; NO-NDD: # %bb.0: 193; NO-NDD-NEXT: shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20] 194; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 195; NO-NDD-NEXT: cmpl $3, %edi # encoding: [0x83,0xff,0x03] 196; NO-NDD-NEXT: setb %al # encoding: [0x0f,0x92,0xc0] 197; NO-NDD-NEXT: retq # encoding: [0xc3] 198; 199; NDD-LABEL: test8: 200; NDD: # %bb.0: 201; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20] 202; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 203; NDD-NEXT: cmpl $3, %edi # encoding: [0x83,0xff,0x03] 204; NDD-NEXT: setb %al # encoding: [0x0f,0x92,0xc0] 205; NDD-NEXT: retq # encoding: [0xc3] 206 %lnot = icmp ult i64 %res, 12884901888 207 %lnot.ext = zext i1 %lnot to i32 208 ret i32 %lnot.ext 209} 210 211define i32 @test9(i64 %res) nounwind { 212; NO-NDD-LABEL: test9: 213; NO-NDD: # %bb.0: 214; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 215; NO-NDD-NEXT: shrq $33, %rdi # encoding: [0x48,0xc1,0xef,0x21] 216; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 217; NO-NDD-NEXT: retq # encoding: [0xc3] 218; 219; NDD-LABEL: test9: 220; NDD: # %bb.0: 221; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 222; NDD-NEXT: shrq $33, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x21] 223; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 224; NDD-NEXT: retq # encoding: [0xc3] 225 %lnot = icmp ult i64 %res, 8589934592 226 %lnot.ext = zext i1 %lnot to i32 227 ret i32 %lnot.ext 228} 229 230define i32 @test10(i64 %res) nounwind { 231; NO-NDD-LABEL: test10: 232; NO-NDD: # %bb.0: 233; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 234; NO-NDD-NEXT: shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20] 235; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 236; NO-NDD-NEXT: retq # encoding: [0xc3] 237; 238; NDD-LABEL: test10: 239; NDD: # %bb.0: 240; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 241; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20] 242; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 243; NDD-NEXT: retq # encoding: [0xc3] 244 %lnot = icmp uge i64 %res, 4294967296 245 %lnot.ext = zext i1 %lnot to i32 246 ret i32 %lnot.ext 247} 248 249define i32 @test11(i64 %l) nounwind { 250; NO-NDD-LABEL: test11: 251; NO-NDD: # %bb.0: 252; NO-NDD-NEXT: shrq $47, %rdi # encoding: [0x48,0xc1,0xef,0x2f] 253; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 254; NO-NDD-NEXT: cmpl $1, %edi # encoding: [0x83,0xff,0x01] 255; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 256; NO-NDD-NEXT: retq # encoding: [0xc3] 257; 258; NDD-LABEL: test11: 259; NDD: # %bb.0: 260; NDD-NEXT: shrq $47, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x2f] 261; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 262; NDD-NEXT: cmpl $1, %edi # encoding: [0x83,0xff,0x01] 263; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 264; NDD-NEXT: retq # encoding: [0xc3] 265 %shr.mask = and i64 %l, -140737488355328 266 %cmp = icmp eq i64 %shr.mask, 140737488355328 267 %conv = zext i1 %cmp to i32 268 ret i32 %conv 269} 270 271define i32 @test12() ssp uwtable { 272; CHECK-LABEL: test12: 273; CHECK: # %bb.0: # %entry 274; CHECK-NEXT: pushq %rax # encoding: [0x50] 275; CHECK-NEXT: .cfi_def_cfa_offset 16 276; CHECK-NEXT: callq test12b@PLT # encoding: [0xe8,A,A,A,A] 277; CHECK-NEXT: # fixup A - offset: 1, value: test12b@PLT-4, kind: FK_PCRel_4 278; CHECK-NEXT: testb %al, %al # encoding: [0x84,0xc0] 279; CHECK-NEXT: je .LBB12_2 # encoding: [0x74,A] 280; CHECK-NEXT: # fixup A - offset: 1, value: .LBB12_2-1, kind: FK_PCRel_1 281; CHECK-NEXT: # %bb.1: # %T 282; CHECK-NEXT: movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00] 283; CHECK-NEXT: popq %rcx # encoding: [0x59] 284; CHECK-NEXT: .cfi_def_cfa_offset 8 285; CHECK-NEXT: retq # encoding: [0xc3] 286; CHECK-NEXT: .LBB12_2: # %F 287; CHECK-NEXT: .cfi_def_cfa_offset 16 288; CHECK-NEXT: movl $2, %eax # encoding: [0xb8,0x02,0x00,0x00,0x00] 289; CHECK-NEXT: popq %rcx # encoding: [0x59] 290; CHECK-NEXT: .cfi_def_cfa_offset 8 291; CHECK-NEXT: retq # encoding: [0xc3] 292entry: 293 %tmp1 = call zeroext i1 @test12b() 294 br i1 %tmp1, label %T, label %F 295 296T: 297 ret i32 1 298 299F: 300 ret i32 2 301} 302 303declare zeroext i1 @test12b() 304 305define i32 @test13(i32 %mask, i32 %base, i32 %intra) { 306; NO-NDD-LABEL: test13: 307; NO-NDD: # %bb.0: 308; NO-NDD-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] 309; NO-NDD-NEXT: testb $8, %dil # encoding: [0x40,0xf6,0xc7,0x08] 310; NO-NDD-NEXT: cmovnel %edx, %eax # encoding: [0x0f,0x45,0xc2] 311; NO-NDD-NEXT: retq # encoding: [0xc3] 312; 313; NDD-LABEL: test13: 314; NDD: # %bb.0: 315; NDD-NEXT: testb $8, %dil # encoding: [0x40,0xf6,0xc7,0x08] 316; NDD-NEXT: cmovnel %edx, %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x45,0xf2] 317; NDD-NEXT: retq # encoding: [0xc3] 318 %and = and i32 %mask, 8 319 %tobool = icmp ne i32 %and, 0 320 %cond = select i1 %tobool, i32 %intra, i32 %base 321 ret i32 %cond 322} 323 324define i32 @test14(i32 %mask, i32 %base, i32 %intra) { 325; NO-NDD-LABEL: test14: 326; NO-NDD: # %bb.0: 327; NO-NDD-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] 328; NO-NDD-NEXT: shrl $7, %edi # encoding: [0xc1,0xef,0x07] 329; NO-NDD-NEXT: cmovnsl %edx, %eax # encoding: [0x0f,0x49,0xc2] 330; NO-NDD-NEXT: retq # encoding: [0xc3] 331; 332; NDD-LABEL: test14: 333; NDD: # %bb.0: 334; NDD-NEXT: shrl $7, %edi # EVEX TO LEGACY Compression encoding: [0xc1,0xef,0x07] 335; NDD-NEXT: cmovnsl %edx, %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x49,0xf2] 336; NDD-NEXT: retq # encoding: [0xc3] 337 %s = lshr i32 %mask, 7 338 %tobool = icmp sgt i32 %s, -1 339 %cond = select i1 %tobool, i32 %intra, i32 %base 340 ret i32 %cond 341} 342 343; PR19964 344define zeroext i1 @test15(i32 %bf.load, i32 %n) { 345; NO-NDD-LABEL: test15: 346; NO-NDD: # %bb.0: 347; NO-NDD-NEXT: shrl $16, %edi # encoding: [0xc1,0xef,0x10] 348; NO-NDD-NEXT: sete %cl # encoding: [0x0f,0x94,0xc1] 349; NO-NDD-NEXT: cmpl %esi, %edi # encoding: [0x39,0xf7] 350; NO-NDD-NEXT: setae %al # encoding: [0x0f,0x93,0xc0] 351; NO-NDD-NEXT: orb %cl, %al # encoding: [0x08,0xc8] 352; NO-NDD-NEXT: retq # encoding: [0xc3] 353; 354; NDD-LABEL: test15: 355; NDD: # %bb.0: 356; NDD-NEXT: shrl $16, %edi # EVEX TO LEGACY Compression encoding: [0xc1,0xef,0x10] 357; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 358; NDD-NEXT: cmpl %esi, %edi # encoding: [0x39,0xf7] 359; NDD-NEXT: setae %cl # encoding: [0x0f,0x93,0xc1] 360; NDD-NEXT: orb %cl, %al # EVEX TO LEGACY Compression encoding: [0x08,0xc8] 361; NDD-NEXT: retq # encoding: [0xc3] 362 %bf.lshr = lshr i32 %bf.load, 16 363 %cmp2 = icmp eq i32 %bf.lshr, 0 364 %cmp5 = icmp uge i32 %bf.lshr, %n 365 %.cmp5 = or i1 %cmp2, %cmp5 366 ret i1 %.cmp5 367} 368 369define i8 @signbit_i16(i16 signext %L) { 370; CHECK-LABEL: signbit_i16: 371; CHECK: # %bb.0: 372; CHECK-NEXT: testw %di, %di # encoding: [0x66,0x85,0xff] 373; CHECK-NEXT: setns %al # encoding: [0x0f,0x99,0xc0] 374; CHECK-NEXT: retq # encoding: [0xc3] 375 %lshr = lshr i16 %L, 15 376 %trunc = trunc i16 %lshr to i8 377 %not = xor i8 %trunc, 1 378 ret i8 %not 379} 380 381define i8 @signbit_i32(i32 %L) { 382; CHECK-LABEL: signbit_i32: 383; CHECK: # %bb.0: 384; CHECK-NEXT: testl %edi, %edi # encoding: [0x85,0xff] 385; CHECK-NEXT: setns %al # encoding: [0x0f,0x99,0xc0] 386; CHECK-NEXT: retq # encoding: [0xc3] 387 %lshr = lshr i32 %L, 31 388 %trunc = trunc i32 %lshr to i8 389 %not = xor i8 %trunc, 1 390 ret i8 %not 391} 392 393define i8 @signbit_i64(i64 %L) { 394; CHECK-LABEL: signbit_i64: 395; CHECK: # %bb.0: 396; CHECK-NEXT: testq %rdi, %rdi # encoding: [0x48,0x85,0xff] 397; CHECK-NEXT: setns %al # encoding: [0x0f,0x99,0xc0] 398; CHECK-NEXT: retq # encoding: [0xc3] 399 %lshr = lshr i64 %L, 63 400 %trunc = trunc i64 %lshr to i8 401 %not = xor i8 %trunc, 1 402 ret i8 %not 403} 404 405define zeroext i1 @signbit_i32_i1(i32 %L) { 406; CHECK-LABEL: signbit_i32_i1: 407; CHECK: # %bb.0: 408; CHECK-NEXT: testl %edi, %edi # encoding: [0x85,0xff] 409; CHECK-NEXT: setns %al # encoding: [0x0f,0x99,0xc0] 410; CHECK-NEXT: retq # encoding: [0xc3] 411 %lshr = lshr i32 %L, 31 412 %trunc = trunc i32 %lshr to i1 413 %not = xor i1 %trunc, true 414 ret i1 %not 415} 416 417; This test failed due to incorrect handling of "shift + icmp" sequence 418define void @test20(i32 %bf.load, i8 %x1, ptr %b_addr) { 419; NO-NDD-LABEL: test20: 420; NO-NDD: # %bb.0: 421; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 422; NO-NDD-NEXT: testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00] 423; NO-NDD-NEXT: # imm = 0xFFFFFF 424; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 425; NO-NDD-NEXT: movzbl %sil, %ecx # encoding: [0x40,0x0f,0xb6,0xce] 426; NO-NDD-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] 427; NO-NDD-NEXT: setne (%rdx) # encoding: [0x0f,0x95,0x02] 428; NO-NDD-NEXT: testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00] 429; NO-NDD-NEXT: # imm = 0xFFFFFF 430; NO-NDD-NEXT: setne d(%rip) # encoding: [0x0f,0x95,0x05,A,A,A,A] 431; NO-NDD-NEXT: # fixup A - offset: 3, value: d-4, kind: reloc_riprel_4byte 432; NO-NDD-NEXT: retq # encoding: [0xc3] 433; 434; NDD-LABEL: test20: 435; NDD: # %bb.0: 436; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 437; NDD-NEXT: testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00] 438; NDD-NEXT: # imm = 0xFFFFFF 439; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 440; NDD-NEXT: movzbl %sil, %ecx # encoding: [0x40,0x0f,0xb6,0xce] 441; NDD-NEXT: addl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc8] 442; NDD-NEXT: setne (%rdx) # encoding: [0x0f,0x95,0x02] 443; NDD-NEXT: testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00] 444; NDD-NEXT: # imm = 0xFFFFFF 445; NDD-NEXT: setne d(%rip) # encoding: [0x0f,0x95,0x05,A,A,A,A] 446; NDD-NEXT: # fixup A - offset: 3, value: d-4, kind: reloc_riprel_4byte 447; NDD-NEXT: retq # encoding: [0xc3] 448 %bf.shl = shl i32 %bf.load, 8 449 %bf.ashr = ashr exact i32 %bf.shl, 8 450 %tobool4 = icmp ne i32 %bf.ashr, 0 451 %conv = zext i1 %tobool4 to i32 452 %conv6 = zext i8 %x1 to i32 453 %add = add nuw nsw i32 %conv, %conv6 454 %tobool7 = icmp ne i32 %add, 0 455 %frombool = zext i1 %tobool7 to i8 456 store i8 %frombool, ptr %b_addr, align 1 457 %tobool14 = icmp ne i32 %bf.shl, 0 458 %frombool15 = zext i1 %tobool14 to i8 459 store i8 %frombool15, ptr @d, align 1 460 ret void 461} 462 463define i32 @highmask_i64_simplify(i64 %val) { 464; CHECK-LABEL: highmask_i64_simplify: 465; CHECK: # %bb.0: 466; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 467; CHECK-NEXT: retq # encoding: [0xc3] 468 %and = and i64 %val, -2199023255552 469 %cmp = icmp ult i64 %and, 0 470 %ret = zext i1 %cmp to i32 471 ret i32 %ret 472} 473 474define i32 @highmask_i64_mask64(i64 %val) { 475; NO-NDD-LABEL: highmask_i64_mask64: 476; NO-NDD: # %bb.0: 477; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 478; NO-NDD-NEXT: shrq $41, %rdi # encoding: [0x48,0xc1,0xef,0x29] 479; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 480; NO-NDD-NEXT: retq # encoding: [0xc3] 481; 482; NDD-LABEL: highmask_i64_mask64: 483; NDD: # %bb.0: 484; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 485; NDD-NEXT: shrq $41, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x29] 486; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 487; NDD-NEXT: retq # encoding: [0xc3] 488 %and = and i64 %val, -2199023255552 489 %cmp = icmp ne i64 %and, 0 490 %ret = zext i1 %cmp to i32 491 ret i32 %ret 492} 493 494define i64 @highmask_i64_mask64_extra_use(i64 %val) nounwind { 495; NO-NDD-LABEL: highmask_i64_mask64_extra_use: 496; NO-NDD: # %bb.0: 497; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 498; NO-NDD-NEXT: movq %rdi, %rcx # encoding: [0x48,0x89,0xf9] 499; NO-NDD-NEXT: shrq $41, %rcx # encoding: [0x48,0xc1,0xe9,0x29] 500; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 501; NO-NDD-NEXT: imulq %rdi, %rax # encoding: [0x48,0x0f,0xaf,0xc7] 502; NO-NDD-NEXT: retq # encoding: [0xc3] 503; 504; NDD-LABEL: highmask_i64_mask64_extra_use: 505; NDD: # %bb.0: 506; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 507; NDD-NEXT: shrq $41, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0xc1,0xef,0x29] 508; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 509; NDD-NEXT: imulq %rdi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0xaf,0xc7] 510; NDD-NEXT: retq # encoding: [0xc3] 511 %and = and i64 %val, -2199023255552 512 %cmp = icmp ne i64 %and, 0 513 %z = zext i1 %cmp to i64 514 %ret = mul i64 %z, %val 515 ret i64 %ret 516} 517 518define i32 @highmask_i64_mask32(i64 %val) { 519; NO-NDD-LABEL: highmask_i64_mask32: 520; NO-NDD: # %bb.0: 521; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 522; NO-NDD-NEXT: shrq $20, %rdi # encoding: [0x48,0xc1,0xef,0x14] 523; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 524; NO-NDD-NEXT: retq # encoding: [0xc3] 525; 526; NDD-LABEL: highmask_i64_mask32: 527; NDD: # %bb.0: 528; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 529; NDD-NEXT: shrq $20, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x14] 530; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 531; NDD-NEXT: retq # encoding: [0xc3] 532 %and = and i64 %val, -1048576 533 %cmp = icmp eq i64 %and, 0 534 %ret = zext i1 %cmp to i32 535 ret i32 %ret 536} 537 538define i64 @highmask_i64_mask32_extra_use(i64 %val) nounwind { 539; NO-NDD-LABEL: highmask_i64_mask32_extra_use: 540; NO-NDD: # %bb.0: 541; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 542; NO-NDD-NEXT: testq $-1048576, %rdi # encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff] 543; NO-NDD-NEXT: # imm = 0xFFF00000 544; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 545; NO-NDD-NEXT: imulq %rdi, %rax # encoding: [0x48,0x0f,0xaf,0xc7] 546; NO-NDD-NEXT: retq # encoding: [0xc3] 547; 548; NDD-LABEL: highmask_i64_mask32_extra_use: 549; NDD: # %bb.0: 550; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 551; NDD-NEXT: testq $-1048576, %rdi # encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff] 552; NDD-NEXT: # imm = 0xFFF00000 553; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 554; NDD-NEXT: imulq %rdi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0xaf,0xc7] 555; NDD-NEXT: retq # encoding: [0xc3] 556 %and = and i64 %val, -1048576 557 %cmp = icmp eq i64 %and, 0 558 %z = zext i1 %cmp to i64 559 %ret = mul i64 %z, %val 560 ret i64 %ret 561} 562 563define i32 @highmask_i64_mask8(i64 %val) { 564; CHECK-LABEL: highmask_i64_mask8: 565; CHECK: # %bb.0: 566; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 567; CHECK-NEXT: testq $-16, %rdi # encoding: [0x48,0xf7,0xc7,0xf0,0xff,0xff,0xff] 568; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 569; CHECK-NEXT: retq # encoding: [0xc3] 570 %and = and i64 %val, -16 571 %cmp = icmp ne i64 %and, 0 572 %ret = zext i1 %cmp to i32 573 ret i32 %ret 574} 575 576define i32 @lowmask_i64_mask64(i64 %val) { 577; NO-NDD-LABEL: lowmask_i64_mask64: 578; NO-NDD: # %bb.0: 579; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 580; NO-NDD-NEXT: shlq $16, %rdi # encoding: [0x48,0xc1,0xe7,0x10] 581; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 582; NO-NDD-NEXT: retq # encoding: [0xc3] 583; 584; NDD-LABEL: lowmask_i64_mask64: 585; NDD: # %bb.0: 586; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 587; NDD-NEXT: shlq $16, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x10] 588; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 589; NDD-NEXT: retq # encoding: [0xc3] 590 %and = and i64 %val, 281474976710655 591 %cmp = icmp eq i64 %and, 0 592 %ret = zext i1 %cmp to i32 593 ret i32 %ret 594} 595 596define i64 @lowmask_i64_mask64_extra_use(i64 %val) nounwind { 597; NO-NDD-LABEL: lowmask_i64_mask64_extra_use: 598; NO-NDD: # %bb.0: 599; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 600; NO-NDD-NEXT: movq %rdi, %rcx # encoding: [0x48,0x89,0xf9] 601; NO-NDD-NEXT: shlq $16, %rcx # encoding: [0x48,0xc1,0xe1,0x10] 602; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 603; NO-NDD-NEXT: imulq %rdi, %rax # encoding: [0x48,0x0f,0xaf,0xc7] 604; NO-NDD-NEXT: retq # encoding: [0xc3] 605; 606; NDD-LABEL: lowmask_i64_mask64_extra_use: 607; NDD: # %bb.0: 608; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 609; NDD-NEXT: shlq $16, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0xc1,0xe7,0x10] 610; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 611; NDD-NEXT: imulq %rdi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0xaf,0xc7] 612; NDD-NEXT: retq # encoding: [0xc3] 613 %and = and i64 %val, 281474976710655 614 %cmp = icmp eq i64 %and, 0 615 %z = zext i1 %cmp to i64 616 %ret = mul i64 %z, %val 617 ret i64 %ret 618} 619 620define i32 @lowmask_i64_mask32(i64 %val) { 621; NO-NDD-LABEL: lowmask_i64_mask32: 622; NO-NDD: # %bb.0: 623; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 624; NO-NDD-NEXT: shlq $44, %rdi # encoding: [0x48,0xc1,0xe7,0x2c] 625; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 626; NO-NDD-NEXT: retq # encoding: [0xc3] 627; 628; NDD-LABEL: lowmask_i64_mask32: 629; NDD: # %bb.0: 630; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 631; NDD-NEXT: shlq $44, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x2c] 632; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 633; NDD-NEXT: retq # encoding: [0xc3] 634 %and = and i64 %val, 1048575 635 %cmp = icmp ne i64 %and, 0 636 %ret = zext i1 %cmp to i32 637 ret i32 %ret 638} 639 640define i64 @lowmask_i64_mask32_extra_use(i64 %val) nounwind { 641; NO-NDD-LABEL: lowmask_i64_mask32_extra_use: 642; NO-NDD: # %bb.0: 643; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 644; NO-NDD-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00] 645; NO-NDD-NEXT: # imm = 0xFFFFF 646; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 647; NO-NDD-NEXT: imulq %rdi, %rax # encoding: [0x48,0x0f,0xaf,0xc7] 648; NO-NDD-NEXT: retq # encoding: [0xc3] 649; 650; NDD-LABEL: lowmask_i64_mask32_extra_use: 651; NDD: # %bb.0: 652; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 653; NDD-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00] 654; NDD-NEXT: # imm = 0xFFFFF 655; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 656; NDD-NEXT: imulq %rdi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0xaf,0xc7] 657; NDD-NEXT: retq # encoding: [0xc3] 658 %and = and i64 %val, 1048575 659 %cmp = icmp ne i64 %and, 0 660 %z = zext i1 %cmp to i64 661 %ret = mul i64 %z, %val 662 ret i64 %ret 663} 664 665define i32 @lowmask_i64_mask8(i64 %val) { 666; CHECK-LABEL: lowmask_i64_mask8: 667; CHECK: # %bb.0: 668; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 669; CHECK-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f] 670; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 671; CHECK-NEXT: retq # encoding: [0xc3] 672 %and = and i64 %val, 31 673 %cmp = icmp eq i64 %and, 0 674 %ret = zext i1 %cmp to i32 675 ret i32 %ret 676} 677 678define i32 @highmask_i32_mask32(i32 %val) { 679; CHECK-LABEL: highmask_i32_mask32: 680; CHECK: # %bb.0: 681; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 682; CHECK-NEXT: testl $-1048576, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xf0,0xff] 683; CHECK-NEXT: # imm = 0xFFF00000 684; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 685; CHECK-NEXT: retq # encoding: [0xc3] 686 %and = and i32 %val, -1048576 687 %cmp = icmp ne i32 %and, 0 688 %ret = zext i1 %cmp to i32 689 ret i32 %ret 690} 691 692define i32 @highmask_i32_mask8(i32 %val) { 693; CHECK-LABEL: highmask_i32_mask8: 694; CHECK: # %bb.0: 695; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 696; CHECK-NEXT: testl $-16, %edi # encoding: [0xf7,0xc7,0xf0,0xff,0xff,0xff] 697; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 698; CHECK-NEXT: retq # encoding: [0xc3] 699 %and = and i32 %val, -16 700 %cmp = icmp eq i32 %and, 0 701 %ret = zext i1 %cmp to i32 702 ret i32 %ret 703} 704 705define i32 @lowmask_i32_mask32(i32 %val) { 706; CHECK-LABEL: lowmask_i32_mask32: 707; CHECK: # %bb.0: 708; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 709; CHECK-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00] 710; CHECK-NEXT: # imm = 0xFFFFF 711; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 712; CHECK-NEXT: retq # encoding: [0xc3] 713 %and = and i32 %val, 1048575 714 %cmp = icmp eq i32 %and, 0 715 %ret = zext i1 %cmp to i32 716 ret i32 %ret 717} 718 719define i32 @lowmask_i32_mask8(i32 %val) { 720; CHECK-LABEL: lowmask_i32_mask8: 721; CHECK: # %bb.0: 722; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 723; CHECK-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f] 724; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 725; CHECK-NEXT: retq # encoding: [0xc3] 726 %and = and i32 %val, 31 727 %cmp = icmp ne i32 %and, 0 728 %ret = zext i1 %cmp to i32 729 ret i32 %ret 730} 731 732define i1 @shifted_mask64_testb(i64 %a) { 733; NO-NDD-LABEL: shifted_mask64_testb: 734; NO-NDD: # %bb.0: 735; NO-NDD-NEXT: shrq $50, %rdi # encoding: [0x48,0xc1,0xef,0x32] 736; NO-NDD-NEXT: testb %dil, %dil # encoding: [0x40,0x84,0xff] 737; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 738; NO-NDD-NEXT: retq # encoding: [0xc3] 739; 740; NDD-LABEL: shifted_mask64_testb: 741; NDD: # %bb.0: 742; NDD-NEXT: shrq $50, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x32] 743; NDD-NEXT: testb %dil, %dil # encoding: [0x40,0x84,0xff] 744; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 745; NDD-NEXT: retq # encoding: [0xc3] 746 %v0 = and i64 %a, 287104476244869120 ; 0xff << 50 747 %v1 = icmp ne i64 %v0, 0 748 ret i1 %v1 749} 750 751define i1 @shifted_mask64_testw(i64 %a) { 752; NO-NDD-LABEL: shifted_mask64_testw: 753; NO-NDD: # %bb.0: 754; NO-NDD-NEXT: shrq $33, %rdi # encoding: [0x48,0xc1,0xef,0x21] 755; NO-NDD-NEXT: testw %di, %di # encoding: [0x66,0x85,0xff] 756; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 757; NO-NDD-NEXT: retq # encoding: [0xc3] 758; 759; NDD-LABEL: shifted_mask64_testw: 760; NDD: # %bb.0: 761; NDD-NEXT: shrq $33, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x21] 762; NDD-NEXT: testw %di, %di # encoding: [0x66,0x85,0xff] 763; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 764; NDD-NEXT: retq # encoding: [0xc3] 765 %v0 = and i64 %a, 562941363486720 ; 0xffff << 33 766 %v1 = icmp ne i64 %v0, 0 767 ret i1 %v1 768} 769 770define i1 @shifted_mask64_testl(i64 %a) { 771; NO-NDD-LABEL: shifted_mask64_testl: 772; NO-NDD: # %bb.0: 773; NO-NDD-NEXT: shrq $7, %rdi # encoding: [0x48,0xc1,0xef,0x07] 774; NO-NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff] 775; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 776; NO-NDD-NEXT: retq # encoding: [0xc3] 777; 778; NDD-LABEL: shifted_mask64_testl: 779; NDD: # %bb.0: 780; NDD-NEXT: shrq $7, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x07] 781; NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff] 782; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 783; NDD-NEXT: retq # encoding: [0xc3] 784 %v0 = and i64 %a, 549755813760 ; 0xffffffff << 7 785 %v1 = icmp eq i64 %v0, 0 786 ret i1 %v1 787} 788 789define i1 @shifted_mask64_extra_use_const(i64 %a) { 790; CHECK-LABEL: shifted_mask64_extra_use_const: 791; CHECK: # %bb.0: 792; CHECK-NEXT: movabsq $287104476244869120, %rcx # encoding: [0x48,0xb9,0x00,0x00,0x00,0x00,0x00,0x00,0xfc,0x03] 793; CHECK-NEXT: # imm = 0x3FC000000000000 794; CHECK-NEXT: testq %rcx, %rdi # encoding: [0x48,0x85,0xcf] 795; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 796; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] 797; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte 798; CHECK-NEXT: retq # encoding: [0xc3] 799 %v0 = and i64 %a, 287104476244869120 ; 0xff << 50 800 %v1 = icmp ne i64 %v0, 0 801 store i64 287104476244869120, ptr @d64 802 ret i1 %v1 803} 804 805define i1 @shifted_mask64_extra_use_and(i64 %a) { 806; NO-NDD-LABEL: shifted_mask64_extra_use_and: 807; NO-NDD: # %bb.0: 808; NO-NDD-NEXT: movabsq $287104476244869120, %rcx # encoding: [0x48,0xb9,0x00,0x00,0x00,0x00,0x00,0x00,0xfc,0x03] 809; NO-NDD-NEXT: # imm = 0x3FC000000000000 810; NO-NDD-NEXT: andq %rdi, %rcx # encoding: [0x48,0x21,0xf9] 811; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 812; NO-NDD-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] 813; NO-NDD-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte 814; NO-NDD-NEXT: retq # encoding: [0xc3] 815; 816; NDD-LABEL: shifted_mask64_extra_use_and: 817; NDD: # %bb.0: 818; NDD-NEXT: movabsq $287104476244869120, %rax # encoding: [0x48,0xb8,0x00,0x00,0x00,0x00,0x00,0x00,0xfc,0x03] 819; NDD-NEXT: # imm = 0x3FC000000000000 820; NDD-NEXT: andq %rax, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0x21,0xc7] 821; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 822; NDD-NEXT: movq %rdi, d64(%rip) # encoding: [0x48,0x89,0x3d,A,A,A,A] 823; NDD-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte 824; NDD-NEXT: retq # encoding: [0xc3] 825 %v0 = and i64 %a, 287104476244869120 ; 0xff << 50 826 %v1 = icmp ne i64 %v0, 0 827 store i64 %v0, ptr @d64 828 ret i1 %v1 829} 830 831define i1 @shifted_mask32_testl_immediate(i64 %a) { 832; CHECK-LABEL: shifted_mask32_testl_immediate: 833; CHECK: # %bb.0: 834; CHECK-NEXT: testl $66846720, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xfc,0x03] 835; CHECK-NEXT: # imm = 0x3FC0000 836; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 837; CHECK-NEXT: retq # encoding: [0xc3] 838 %v0 = and i64 %a, 66846720 ; 0xff << 18 839 %v1 = icmp ne i64 %v0, 0 840 ret i1 %v1 841} 842 843define i1 @shifted_mask32_extra_use_const(i64 %a) { 844; CHECK-LABEL: shifted_mask32_extra_use_const: 845; CHECK: # %bb.0: 846; CHECK-NEXT: testl $66846720, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xfc,0x03] 847; CHECK-NEXT: # imm = 0x3FC0000 848; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 849; CHECK-NEXT: movq $66846720, d64(%rip) # encoding: [0x48,0xc7,0x05,A,A,A,A,0x00,0x00,0xfc,0x03] 850; CHECK-NEXT: # fixup A - offset: 3, value: d64-8, kind: reloc_riprel_4byte 851; CHECK-NEXT: # imm = 0x3FC0000 852; CHECK-NEXT: retq # encoding: [0xc3] 853 %v0 = and i64 %a, 66846720 ; 0xff << 18 854 %v1 = icmp ne i64 %v0, 0 855 store i64 66846720, ptr @d64 856 ret i1 %v1 857} 858 859define i1 @shifted_mask32_extra_use_and(i64 %a) { 860; NO-NDD-LABEL: shifted_mask32_extra_use_and: 861; NO-NDD: # %bb.0: 862; NO-NDD-NEXT: andq $66846720, %rdi # encoding: [0x48,0x81,0xe7,0x00,0x00,0xfc,0x03] 863; NO-NDD-NEXT: # imm = 0x3FC0000 864; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 865; NO-NDD-NEXT: movq %rdi, d64(%rip) # encoding: [0x48,0x89,0x3d,A,A,A,A] 866; NO-NDD-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte 867; NO-NDD-NEXT: retq # encoding: [0xc3] 868; 869; NDD-LABEL: shifted_mask32_extra_use_and: 870; NDD: # %bb.0: 871; NDD-NEXT: andq $66846720, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0x81,0xe7,0x00,0x00,0xfc,0x03] 872; NDD-NEXT: # imm = 0x3FC0000 873; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] 874; NDD-NEXT: movq %rdi, d64(%rip) # encoding: [0x48,0x89,0x3d,A,A,A,A] 875; NDD-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte 876; NDD-NEXT: retq # encoding: [0xc3] 877 %v0 = and i64 %a, 66846720 ; 0xff << 50 878 %v1 = icmp ne i64 %v0, 0 879 store i64 %v0, ptr @d64 880 ret i1 %v1 881} 882 883define { i64, i64 } @pr39968(i64, i64, i32) { 884; NO-NDD-LABEL: pr39968: 885; NO-NDD: # %bb.0: 886; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 887; NO-NDD-NEXT: testb $64, %dl # encoding: [0xf6,0xc2,0x40] 888; NO-NDD-NEXT: cmovneq %rdi, %rsi # encoding: [0x48,0x0f,0x45,0xf7] 889; NO-NDD-NEXT: cmovneq %rdi, %rax # encoding: [0x48,0x0f,0x45,0xc7] 890; NO-NDD-NEXT: movq %rsi, %rdx # encoding: [0x48,0x89,0xf2] 891; NO-NDD-NEXT: retq # encoding: [0xc3] 892; 893; NDD-LABEL: pr39968: 894; NDD: # %bb.0: 895; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] 896; NDD-NEXT: testb $64, %dl # encoding: [0xf6,0xc2,0x40] 897; NDD-NEXT: cmovneq %rdi, %rsi, %rdx # encoding: [0x62,0xf4,0xec,0x18,0x45,0xf7] 898; NDD-NEXT: cmovneq %rdi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x45,0xc7] 899; NDD-NEXT: retq # encoding: [0xc3] 900 %4 = and i32 %2, 64 901 %5 = icmp ne i32 %4, 0 902 %6 = select i1 %5, i64 %0, i64 %1 903 %7 = select i1 %5, i64 %0, i64 0 904 %8 = insertvalue { i64, i64 } undef, i64 %7, 0 905 %9 = insertvalue { i64, i64 } %8, i64 %6, 1 906 ret { i64, i64 } %9 907} 908 909; Make sure we use a 32-bit comparison without an extend based on the input 910; being pre-sign extended by caller. 911define i32 @pr42189(i16 signext %c) { 912; CHECK-LABEL: pr42189: 913; CHECK: # %bb.0: # %entry 914; CHECK-NEXT: cmpl $32767, %edi # encoding: [0x81,0xff,0xff,0x7f,0x00,0x00] 915; CHECK-NEXT: # imm = 0x7FFF 916; CHECK-NEXT: jne f@PLT # TAILCALL 917; CHECK-NEXT: # encoding: [0x75,A] 918; CHECK-NEXT: # fixup A - offset: 1, value: f@PLT-1, kind: FK_PCRel_1 919; CHECK-NEXT: # %bb.1: # %if.then 920; CHECK-NEXT: jmp g@PLT # TAILCALL 921; CHECK-NEXT: # encoding: [0xeb,A] 922; CHECK-NEXT: # fixup A - offset: 1, value: g@PLT-1, kind: FK_PCRel_1 923entry: 924 %cmp = icmp eq i16 %c, 32767 925 br i1 %cmp, label %if.then, label %if.end 926 927if.then: ; preds = %entry 928 %call = tail call i32 @g() 929 br label %return 930 931if.end: ; preds = %entry 932 %call2 = tail call i32 @f() 933 br label %return 934 935return: ; preds = %if.end, %if.then 936 %retval.0 = phi i32 [ %call, %if.then ], [ %call2, %if.end ] 937 ret i32 %retval.0 938} 939 940declare i32 @g() 941declare i32 @f() 942 943; Make sure we fold the load+and into a test from memory. 944; The store makes sure the chain result of the load is used which used to 945; prevent the post isel peephole from catching this. 946define i1 @fold_test_and_with_chain(ptr %x, ptr %y, i32 %z) { 947; CHECK-LABEL: fold_test_and_with_chain: 948; CHECK: # %bb.0: 949; CHECK-NEXT: testl %edx, (%rdi) # encoding: [0x85,0x17] 950; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] 951; CHECK-NEXT: movl %edx, (%rsi) # encoding: [0x89,0x16] 952; CHECK-NEXT: retq # encoding: [0xc3] 953 %a = load i32, ptr %x 954 %b = and i32 %z, %a 955 %c = icmp eq i32 %b, 0 956 store i32 %z, ptr %y 957 ret i1 %c 958} 959