xref: /llvm-project/llvm/test/CodeGen/X86/buildvec-bitcast.ll (revision 6b6f272f355a2cbc753e9057dd7aefb1a74a0409)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc < %s -mtriple=x86_64 -mattr=avx512bw | FileCheck %s
3
4; Verify that the DAGCombiner doesn't change build_vector to concat_vectors if
5; the vector element type is different than splat type. The example here:
6;   v8i1 = build_vector (i8 (bitcast (v8i1 X))), ..., (i8 (bitcast (v8i1 X))))
7
8define <8 x i1> @foo(<8 x i1> %mask.i1) {
9; CHECK-LABEL: foo:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
12; CHECK-NEXT:    retq
13entry:
14  %0 = and <8 x i1> %mask.i1, <i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>
15  %1 = bitcast <8 x i1> %0 to i8
16  %2 = icmp ne i8 %1, 0
17  %insert54 = insertelement <8 x i1> zeroinitializer, i1 %2, i64 0
18  %splat55 = shufflevector <8 x i1> %insert54, <8 x i1> zeroinitializer, <8 x i32> zeroinitializer
19  %3 = and <8 x i1> %0, %splat55
20  br label %end
21
22end:                           ; preds = %entry
23  %4 = select <8 x i1> %3, <8 x i1> zeroinitializer, <8 x i1> zeroinitializer
24  ret <8 x i1> %4
25}
26