1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s 3 4; Verify that backwards propagation of a mask does not affect 5; nodes with multiple result values. In both tests, the stored 6; 32-bit value should be masked to an 8-bit number (and 255). 7 8@b = dso_local local_unnamed_addr global i32 918, align 4 9@d = dso_local local_unnamed_addr global i32 8089, align 4 10@c = common dso_local local_unnamed_addr global i32 0, align 4 11@a = common dso_local local_unnamed_addr global i32 0, align 4 12 13define dso_local void @PR37667() { 14; CHECK-LABEL: PR37667: 15; CHECK: # %bb.0: 16; CHECK-NEXT: movl b(%rip), %eax 17; CHECK-NEXT: xorl %edx, %edx 18; CHECK-NEXT: divl d(%rip) 19; CHECK-NEXT: orl c(%rip), %edx 20; CHECK-NEXT: movzbl %dl, %eax 21; CHECK-NEXT: movl %eax, a(%rip) 22; CHECK-NEXT: retq 23 %t0 = load i32, ptr @c, align 4 24 %t1 = load i32, ptr @b, align 4 25 %t2 = load i32, ptr @d, align 4 26 %rem = urem i32 %t1, %t2 27 %or = or i32 %rem, %t0 28 %conv1 = and i32 %or, 255 29 store i32 %conv1, ptr @a, align 4 30 ret void 31} 32 33define dso_local void @PR37060() { 34; CHECK-LABEL: PR37060: 35; CHECK: # %bb.0: 36; CHECK-NEXT: movl $-1, %eax 37; CHECK-NEXT: cltd 38; CHECK-NEXT: idivl c(%rip) 39; CHECK-NEXT: xorl b(%rip), %edx 40; CHECK-NEXT: movzbl %dl, %eax 41; CHECK-NEXT: movl %eax, a(%rip) 42; CHECK-NEXT: retq 43 %t0 = load i32, ptr @c, align 4 44 %rem = srem i32 -1, %t0 45 %t2 = load i32, ptr @b, align 4 46 %xor = xor i32 %t2, %rem 47 %conv3 = and i32 %xor, 255 48 store i32 %conv3, ptr @a, align 4 49 ret void 50} 51 52