1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2;RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=CHECK,KNL 3;RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=CHECK,SKX 4 5define <16 x i32> @ashr_16_i32(<16 x i32> %a) { 6; CHECK-LABEL: ashr_16_i32: 7; CHECK: # %bb.0: 8; CHECK-NEXT: vpsrad $12, %zmm0, %zmm0 9; CHECK-NEXT: retq 10 %b = ashr <16 x i32> %a, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12> 11 ret <16 x i32> %b 12} 13 14define <16 x i32> @lshr_16_i32(<16 x i32> %a) { 15; CHECK-LABEL: lshr_16_i32: 16; CHECK: # %bb.0: 17; CHECK-NEXT: vpsrld $1, %zmm0, %zmm0 18; CHECK-NEXT: retq 19 %b = lshr <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 20 ret <16 x i32> %b 21} 22 23define <16 x i32> @shl_16_i32(<16 x i32> %a) { 24; CHECK-LABEL: shl_16_i32: 25; CHECK: # %bb.0: 26; CHECK-NEXT: vpslld $12, %zmm0, %zmm0 27; CHECK-NEXT: retq 28 %b = shl <16 x i32> %a, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12> 29 ret <16 x i32> %b 30} 31 32define <8 x i64> @ashr_8_i64(<8 x i64> %a) { 33; CHECK-LABEL: ashr_8_i64: 34; CHECK: # %bb.0: 35; CHECK-NEXT: vpsraq $12, %zmm0, %zmm0 36; CHECK-NEXT: retq 37 %b = ashr <8 x i64> %a, <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12> 38 ret <8 x i64> %b 39} 40 41define <8 x i64> @lshr_8_i64(<8 x i64> %a) { 42; CHECK-LABEL: lshr_8_i64: 43; CHECK: # %bb.0: 44; CHECK-NEXT: vpsrlq $1, %zmm0, %zmm0 45; CHECK-NEXT: retq 46 %b = lshr <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1> 47 ret <8 x i64> %b 48} 49 50define <8 x i64> @shl_8_i64(<8 x i64> %a) { 51; CHECK-LABEL: shl_8_i64: 52; CHECK: # %bb.0: 53; CHECK-NEXT: vpsllq $12, %zmm0, %zmm0 54; CHECK-NEXT: retq 55 %b = shl <8 x i64> %a, <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12> 56 ret <8 x i64> %b 57} 58 59define <4 x i64> @ashr_4_i64(<4 x i64> %a) { 60; KNL-LABEL: ashr_4_i64: 61; KNL: # %bb.0: 62; KNL-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 63; KNL-NEXT: vpsraq $12, %zmm0, %zmm0 64; KNL-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 65; KNL-NEXT: retq 66; 67; SKX-LABEL: ashr_4_i64: 68; SKX: # %bb.0: 69; SKX-NEXT: vpsraq $12, %ymm0, %ymm0 70; SKX-NEXT: retq 71 %b = ashr <4 x i64> %a, <i64 12, i64 12, i64 12, i64 12> 72 ret <4 x i64> %b 73} 74 75define <4 x i64> @lshr_4_i64(<4 x i64> %a) { 76; CHECK-LABEL: lshr_4_i64: 77; CHECK: # %bb.0: 78; CHECK-NEXT: vpsrlq $1, %ymm0, %ymm0 79; CHECK-NEXT: retq 80 %b = lshr <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 81 ret <4 x i64> %b 82} 83 84define <4 x i64> @shl_4_i64(<4 x i64> %a) { 85; CHECK-LABEL: shl_4_i64: 86; CHECK: # %bb.0: 87; CHECK-NEXT: vpsllq $12, %ymm0, %ymm0 88; CHECK-NEXT: retq 89 %b = shl <4 x i64> %a, <i64 12, i64 12, i64 12, i64 12> 90 ret <4 x i64> %b 91} 92 93define <8 x i64> @variable_shl4(<8 x i64> %x, <8 x i64> %y) { 94; CHECK-LABEL: variable_shl4: 95; CHECK: # %bb.0: 96; CHECK-NEXT: vpsllvq %zmm1, %zmm0, %zmm0 97; CHECK-NEXT: retq 98 %k = shl <8 x i64> %x, %y 99 ret <8 x i64> %k 100} 101 102define <16 x i32> @variable_shl5(<16 x i32> %x, <16 x i32> %y) { 103; CHECK-LABEL: variable_shl5: 104; CHECK: # %bb.0: 105; CHECK-NEXT: vpsllvd %zmm1, %zmm0, %zmm0 106; CHECK-NEXT: retq 107 %k = shl <16 x i32> %x, %y 108 ret <16 x i32> %k 109} 110 111define <16 x i32> @variable_srl0(<16 x i32> %x, <16 x i32> %y) { 112; CHECK-LABEL: variable_srl0: 113; CHECK: # %bb.0: 114; CHECK-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 115; CHECK-NEXT: retq 116 %k = lshr <16 x i32> %x, %y 117 ret <16 x i32> %k 118} 119 120define <8 x i64> @variable_srl2(<8 x i64> %x, <8 x i64> %y) { 121; CHECK-LABEL: variable_srl2: 122; CHECK: # %bb.0: 123; CHECK-NEXT: vpsrlvq %zmm1, %zmm0, %zmm0 124; CHECK-NEXT: retq 125 %k = lshr <8 x i64> %x, %y 126 ret <8 x i64> %k 127} 128 129define <16 x i32> @variable_sra1(<16 x i32> %x, <16 x i32> %y) { 130; CHECK-LABEL: variable_sra1: 131; CHECK: # %bb.0: 132; CHECK-NEXT: vpsravd %zmm1, %zmm0, %zmm0 133; CHECK-NEXT: retq 134 %k = ashr <16 x i32> %x, %y 135 ret <16 x i32> %k 136} 137 138define <8 x i64> @variable_sra2(<8 x i64> %x, <8 x i64> %y) { 139; CHECK-LABEL: variable_sra2: 140; CHECK: # %bb.0: 141; CHECK-NEXT: vpsravq %zmm1, %zmm0, %zmm0 142; CHECK-NEXT: retq 143 %k = ashr <8 x i64> %x, %y 144 ret <8 x i64> %k 145} 146 147define <4 x i64> @variable_sra3(<4 x i64> %x, <4 x i64> %y) { 148; KNL-LABEL: variable_sra3: 149; KNL: # %bb.0: 150; KNL-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 151; KNL-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 152; KNL-NEXT: vpsravq %zmm1, %zmm0, %zmm0 153; KNL-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 154; KNL-NEXT: retq 155; 156; SKX-LABEL: variable_sra3: 157; SKX: # %bb.0: 158; SKX-NEXT: vpsravq %ymm1, %ymm0, %ymm0 159; SKX-NEXT: retq 160 %k = ashr <4 x i64> %x, %y 161 ret <4 x i64> %k 162} 163 164define <8 x i16> @variable_sra4(<8 x i16> %x, <8 x i16> %y) { 165; KNL-LABEL: variable_sra4: 166; KNL: # %bb.0: 167; KNL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 168; KNL-NEXT: vpmovsxwd %xmm0, %ymm0 169; KNL-NEXT: vpsravd %ymm1, %ymm0, %ymm0 170; KNL-NEXT: vpmovdw %zmm0, %ymm0 171; KNL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 172; KNL-NEXT: retq 173; 174; SKX-LABEL: variable_sra4: 175; SKX: # %bb.0: 176; SKX-NEXT: vpsravw %xmm1, %xmm0, %xmm0 177; SKX-NEXT: retq 178 %k = ashr <8 x i16> %x, %y 179 ret <8 x i16> %k 180} 181 182define <16 x i32> @variable_sra01_load(<16 x i32> %x, ptr %y) { 183; CHECK-LABEL: variable_sra01_load: 184; CHECK: # %bb.0: 185; CHECK-NEXT: vpsravd (%rdi), %zmm0, %zmm0 186; CHECK-NEXT: retq 187 %y1 = load <16 x i32>, ptr %y 188 %k = ashr <16 x i32> %x, %y1 189 ret <16 x i32> %k 190} 191 192define <16 x i32> @variable_shl1_load(<16 x i32> %x, ptr %y) { 193; CHECK-LABEL: variable_shl1_load: 194; CHECK: # %bb.0: 195; CHECK-NEXT: vpsllvd (%rdi), %zmm0, %zmm0 196; CHECK-NEXT: retq 197 %y1 = load <16 x i32>, ptr %y 198 %k = shl <16 x i32> %x, %y1 199 ret <16 x i32> %k 200} 201 202define <16 x i32> @variable_srl0_load(<16 x i32> %x, ptr %y) { 203; CHECK-LABEL: variable_srl0_load: 204; CHECK: # %bb.0: 205; CHECK-NEXT: vpsrlvd (%rdi), %zmm0, %zmm0 206; CHECK-NEXT: retq 207 %y1 = load <16 x i32>, ptr %y 208 %k = lshr <16 x i32> %x, %y1 209 ret <16 x i32> %k 210} 211 212define <8 x i64> @variable_srl3_load(<8 x i64> %x, ptr %y) { 213; CHECK-LABEL: variable_srl3_load: 214; CHECK: # %bb.0: 215; CHECK-NEXT: vpsrlvq (%rdi), %zmm0, %zmm0 216; CHECK-NEXT: retq 217 %y1 = load <8 x i64>, ptr %y 218 %k = lshr <8 x i64> %x, %y1 219 ret <8 x i64> %k 220} 221