xref: /llvm-project/llvm/test/CodeGen/X86/avx512-build-vector.ll (revision be6c752e157638849f1f59f7e2b7ecbe11a022fe)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
3
4define <16 x i32> @test2(<16 x i32> %x) {
5; CHECK-LABEL: test2:
6; CHECK:       ## %bb.0:
7; CHECK-NEXT:    vpternlogd {{.*#+}} zmm1 = -1
8; CHECK-NEXT:    vpaddd %zmm1, %zmm0, %zmm0
9; CHECK-NEXT:    retq
10   %res = add <16 x i32><i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, %x
11   ret <16 x i32>%res
12}
13
14define <16 x float> @test3(<4 x float> %a) {
15; CHECK-LABEL: test3:
16; CHECK:       ## %bb.0:
17; CHECK-NEXT:    ## kill: def $xmm0 killed $xmm0 def $zmm0
18; CHECK-NEXT:    vpmovsxbd {{.*#+}} zmm2 = [0,1,2,3,4,18,16,7,8,9,10,11,12,13,14,15]
19; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm1
20; CHECK-NEXT:    vpermt2ps %zmm0, %zmm2, %zmm1
21; CHECK-NEXT:    vmovaps %zmm1, %zmm0
22; CHECK-NEXT:    retq
23  %b = extractelement <4 x float> %a, i32 2
24  %c = insertelement <16 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float undef, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, float %b, i32 5
25  %b1 = extractelement <4 x float> %a, i32 0
26  %c1 = insertelement <16 x float> %c, float %b1, i32 6
27  ret <16 x float>%c1
28}
29