1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64 4 5define <4 x i64> @vpandn(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 6; CHECK-LABEL: vpandn: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 9; CHECK-NEXT: vpsubq %ymm1, %ymm0, %ymm1 10; CHECK-NEXT: vpandn %ymm0, %ymm1, %ymm0 11; CHECK-NEXT: ret{{[l|q]}} 12entry: 13 ; Force the execution domain with an add. 14 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 15 %y = xor <4 x i64> %a2, <i64 -1, i64 -1, i64 -1, i64 -1> 16 %x = and <4 x i64> %a, %y 17 ret <4 x i64> %x 18} 19 20define <4 x i64> @vpand(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 21; CHECK-LABEL: vpand: 22; CHECK: # %bb.0: # %entry 23; CHECK-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 24; CHECK-NEXT: vpsubq %ymm2, %ymm0, %ymm0 25; CHECK-NEXT: vpand %ymm1, %ymm0, %ymm0 26; CHECK-NEXT: ret{{[l|q]}} 27entry: 28 ; Force the execution domain with an add. 29 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 30 %x = and <4 x i64> %a2, %b 31 ret <4 x i64> %x 32} 33 34define <4 x i64> @vpor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 35; CHECK-LABEL: vpor: 36; CHECK: # %bb.0: # %entry 37; CHECK-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 38; CHECK-NEXT: vpsubq %ymm2, %ymm0, %ymm0 39; CHECK-NEXT: vpor %ymm1, %ymm0, %ymm0 40; CHECK-NEXT: ret{{[l|q]}} 41entry: 42 ; Force the execution domain with an add. 43 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 44 %x = or <4 x i64> %a2, %b 45 ret <4 x i64> %x 46} 47 48define <4 x i64> @vpxor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 49; CHECK-LABEL: vpxor: 50; CHECK: # %bb.0: # %entry 51; CHECK-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 52; CHECK-NEXT: vpsubq %ymm2, %ymm0, %ymm0 53; CHECK-NEXT: vpxor %ymm1, %ymm0, %ymm0 54; CHECK-NEXT: ret{{[l|q]}} 55entry: 56 ; Force the execution domain with an add. 57 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 58 %x = xor <4 x i64> %a2, %b 59 ret <4 x i64> %x 60} 61 62define <32 x i8> @vpblendvb(<32 x i1> %cond, <32 x i8> %x, <32 x i8> %y) { 63; CHECK-LABEL: vpblendvb: 64; CHECK: # %bb.0: 65; CHECK-NEXT: vpsllw $7, %ymm0, %ymm0 66; CHECK-NEXT: vpblendvb %ymm0, %ymm1, %ymm2, %ymm0 67; CHECK-NEXT: ret{{[l|q]}} 68 %min = select <32 x i1> %cond, <32 x i8> %x, <32 x i8> %y 69 ret <32 x i8> %min 70} 71 72define <8 x i32> @allOnes() nounwind { 73; CHECK-LABEL: allOnes: 74; CHECK: # %bb.0: 75; CHECK-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm0 76; CHECK-NEXT: ret{{[l|q]}} 77 ret <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 78} 79 80define <16 x i16> @allOnes2() nounwind { 81; CHECK-LABEL: allOnes2: 82; CHECK: # %bb.0: 83; CHECK-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm0 84; CHECK-NEXT: ret{{[l|q]}} 85 ret <16 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 86} 87;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 88; X64: {{.*}} 89; X86: {{.*}} 90