xref: /llvm-project/llvm/test/CodeGen/X86/atomic-monotonic.ll (revision f0dd12ec5c0169ba5b4363b62d59511181cf954a)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -O0 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck --check-prefixes=CHECK,CHECK-O0 %s
3; RUN: llc -O3 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
4
5define i8 @load_i8(ptr %ptr) {
6; CHECK-O0-LABEL: load_i8:
7; CHECK-O0:       # %bb.0:
8; CHECK-O0-NEXT:    movb (%rdi), %al
9; CHECK-O0-NEXT:    retq
10;
11; CHECK-O3-LABEL: load_i8:
12; CHECK-O3:       # %bb.0:
13; CHECK-O3-NEXT:    movzbl (%rdi), %eax
14; CHECK-O3-NEXT:    retq
15  %v = load atomic i8, ptr %ptr monotonic, align 1
16  ret i8 %v
17}
18
19define void @store_i8(ptr %ptr, i8 %v) {
20; CHECK-O0-LABEL: store_i8:
21; CHECK-O0:       # %bb.0:
22; CHECK-O0-NEXT:    movb %sil, %al
23; CHECK-O0-NEXT:    movb %al, (%rdi)
24; CHECK-O0-NEXT:    retq
25;
26; CHECK-O3-LABEL: store_i8:
27; CHECK-O3:       # %bb.0:
28; CHECK-O3-NEXT:    movb %sil, (%rdi)
29; CHECK-O3-NEXT:    retq
30  store atomic i8 %v, ptr %ptr monotonic, align 1
31  ret void
32}
33
34define i16 @load_i16(ptr %ptr) {
35; CHECK-O0-LABEL: load_i16:
36; CHECK-O0:       # %bb.0:
37; CHECK-O0-NEXT:    movw (%rdi), %ax
38; CHECK-O0-NEXT:    retq
39;
40; CHECK-O3-LABEL: load_i16:
41; CHECK-O3:       # %bb.0:
42; CHECK-O3-NEXT:    movzwl (%rdi), %eax
43; CHECK-O3-NEXT:    retq
44  %v = load atomic i16, ptr %ptr monotonic, align 2
45  ret i16 %v
46}
47
48
49define void @store_i16(ptr %ptr, i16 %v) {
50; CHECK-O0-LABEL: store_i16:
51; CHECK-O0:       # %bb.0:
52; CHECK-O0-NEXT:    movw %si, %ax
53; CHECK-O0-NEXT:    movw %ax, (%rdi)
54; CHECK-O0-NEXT:    retq
55;
56; CHECK-O3-LABEL: store_i16:
57; CHECK-O3:       # %bb.0:
58; CHECK-O3-NEXT:    movw %si, (%rdi)
59; CHECK-O3-NEXT:    retq
60  store atomic i16 %v, ptr %ptr monotonic, align 2
61  ret void
62}
63
64define i32 @load_i32(ptr %ptr) {
65; CHECK-LABEL: load_i32:
66; CHECK:       # %bb.0:
67; CHECK-NEXT:    movl (%rdi), %eax
68; CHECK-NEXT:    retq
69  %v = load atomic i32, ptr %ptr monotonic, align 4
70  ret i32 %v
71}
72
73define void @store_i32(ptr %ptr, i32 %v) {
74; CHECK-LABEL: store_i32:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    movl %esi, (%rdi)
77; CHECK-NEXT:    retq
78  store atomic i32 %v, ptr %ptr monotonic, align 4
79  ret void
80}
81
82define i64 @load_i64(ptr %ptr) {
83; CHECK-LABEL: load_i64:
84; CHECK:       # %bb.0:
85; CHECK-NEXT:    movq (%rdi), %rax
86; CHECK-NEXT:    retq
87  %v = load atomic i64, ptr %ptr monotonic, align 8
88  ret i64 %v
89}
90
91define void @store_i64(ptr %ptr, i64 %v) {
92; CHECK-LABEL: store_i64:
93; CHECK:       # %bb.0:
94; CHECK-NEXT:    movq %rsi, (%rdi)
95; CHECK-NEXT:    retq
96  store atomic i64 %v, ptr %ptr monotonic, align 8
97  ret void
98}
99