1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s 3 4; Reported on D129765 5define void @simplify_assertzext(ptr %0) { 6; CHECK-LABEL: simplify_assertzext: 7; CHECK: # %bb.0: # %BB 8; CHECK-NEXT: movl $275047, %eax # imm = 0x43267 9; CHECK-NEXT: movb $1, %cl 10; CHECK-NEXT: .p2align 4 11; CHECK-NEXT: .LBB0_1: # %CF246 12; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 13; CHECK-NEXT: testb %cl, %cl 14; CHECK-NEXT: jne .LBB0_1 15; CHECK-NEXT: # %bb.2: # %CF260 16; CHECK-NEXT: orl $278403, %eax # imm = 0x43F83 17; CHECK-NEXT: movl %eax, (%rdi) 18; CHECK-NEXT: .p2align 4 19; CHECK-NEXT: .LBB0_3: # %CF242 20; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 21; CHECK-NEXT: jmp .LBB0_3 22BB: 23 br label %CF246 24 25CF246: ; preds = %CF246, %BB 26 %Sl23 = select i1 true, i32 275047, i32 355835 27 %Cmp24 = fcmp ule float 0x3841668540000000, undef 28 br i1 %Cmp24, label %CF246, label %CF260 29 30CF260: ; preds = %CF246 31 %B29 = or i32 %Sl23, 278403 32 store i32 %B29, ptr %0, align 4 33 %L40 = load <4 x i1>, ptr %0, align 1 34 br label %CF242 35 36CF242: ; preds = %CF242, %CF260 37 %Sl53 = select i1 undef, <4 x i1> %L40, <4 x i1> undef 38 br label %CF242 39} 40