1; RUN: llc -o - %s -no-integrated-as | FileCheck %s 2target triple = "x86_64--" 3 4; Allow to specify any of the 8/16/32/64 register names interchangeably in 5; constraints 6 7; Produced by C-programs like this: 8; void foo(int p) { register int reg __asm__("r8") = p; 9; __asm__ __volatile__("# REG: %0" : : "r" (reg)); } 10 11; CHECK-LABEL: reg64_as_32: 12; CHECK: # REG: %r8d 13define void @reg64_as_32(i32 %p) { 14 call void asm sideeffect "# REG: $0", "{r8}"(i32 %p) 15 ret void 16} 17 18; CHECK-LABEL: reg64_as_32_float: 19; CHECK: # REG: %r8d 20define void @reg64_as_32_float(float %p) { 21 call void asm sideeffect "# REG: $0", "{r8}"(float %p) 22 ret void 23} 24 25; CHECK-LABEL: reg64_as_16: 26; CHECK: # REG: %r9w 27define void @reg64_as_16(i16 %p) { 28 call void asm sideeffect "# REG: $0", "{r9}"(i16 %p) 29 ret void 30} 31 32; CHECK-LABEL: reg64_as_8: 33; CHECK: # REG: %bpl 34define void @reg64_as_8(i8 %p) { 35 call void asm sideeffect "# REG: $0", "{rbp}"(i8 %p) 36 ret void 37} 38 39; CHECK-LABEL: reg32_as_16: 40; CHECK: # REG: %r15w 41define void @reg32_as_16(i16 %p) { 42 call void asm sideeffect "# REG: $0", "{r15d}"(i16 %p) 43 ret void 44} 45 46; CHECK-LABEL: reg32_as_8: 47; CHECK: # REG: %r12b 48define void @reg32_as_8(i8 %p) { 49 call void asm sideeffect "# REG: $0", "{r12d}"(i8 %p) 50 ret void 51} 52 53; CHECK-LABEL: reg16_as_8: 54; CHECK: # REG: %cl 55define void @reg16_as_8(i8 %p) { 56 call void asm sideeffect "# REG: $0", "{cx}"(i8 %p) 57 ret void 58} 59 60; CHECK-LABEL: reg32_as_64: 61; CHECK: # REG: %rbp 62define void @reg32_as_64(i64 %p) { 63 call void asm sideeffect "# REG: $0", "{ebp}"(i64 %p) 64 ret void 65} 66 67; CHECK-LABEL: reg32_as_64_float: 68; CHECK: # REG: %rbp 69define void @reg32_as_64_float(double %p) { 70 call void asm sideeffect "# REG: $0", "{ebp}"(double %p) 71 ret void 72} 73 74; CHECK-LABEL: reg16_as_64: 75; CHECK: # REG: %r13 76define void @reg16_as_64(i64 %p) { 77 call void asm sideeffect "# REG: $0", "{r13w}"(i64 %p) 78 ret void 79} 80 81; CHECK-LABEL: reg16_as_64_float: 82; CHECK: # REG: %r13 83define void @reg16_as_64_float(double %p) { 84 call void asm sideeffect "# REG: $0", "{r13w}"(double %p) 85 ret void 86} 87 88; CHECK-LABEL: reg8_as_64: 89; CHECK: # REG: %rax 90define void @reg8_as_64(i64 %p) { 91 call void asm sideeffect "# REG: $0", "{al}"(i64 %p) 92 ret void 93} 94 95; CHECK-LABEL: reg8_as_64_float: 96; CHECK: # REG: %rax 97define void @reg8_as_64_float(double %p) { 98 call void asm sideeffect "# REG: $0", "{al}"(double %p) 99 ret void 100} 101 102; CHECK-LABEL: reg16_as_32: 103; CHECK: # REG: %r11d 104define void @reg16_as_32(i32 %p) { 105 call void asm sideeffect "# REG: $0", "{r11w}"(i32 %p) 106 ret void 107} 108 109; CHECK-LABEL: reg16_as_32_float: 110; CHECK: # REG: %r11d 111define void @reg16_as_32_float(float %p) { 112 call void asm sideeffect "# REG: $0", "{r11w}"(float %p) 113 ret void 114} 115 116; CHECK-LABEL: reg8_as_32: 117; CHECK: # REG: %r9d 118define void @reg8_as_32(i32 %p) { 119 call void asm sideeffect "# REG: $0", "{r9b}"(i32 %p) 120 ret void 121} 122 123; CHECK-LABEL: reg8_as_32_float: 124; CHECK: # REG: %r9d 125define void @reg8_as_32_float(float %p) { 126 call void asm sideeffect "# REG: $0", "{r9b}"(float %p) 127 ret void 128} 129 130; CHECK-LABEL: reg8_as_16: 131; CHECK: # REG: %di 132define void @reg8_as_16(i16 %p) { 133 call void asm sideeffect "# REG: $0", "{dil}"(i16 %p) 134 ret void 135} 136 137; CHECK-LABEL: egpr_reg64_as_32: 138; CHECK: # REG: %r16d 139define void @egpr_reg64_as_32(i32 %p) { 140 call void asm sideeffect "# REG: $0", "{r16}"(i32 %p) 141 ret void 142} 143 144; CHECK-LABEL: egpr_reg64_as_32_float: 145; CHECK: # REG: %r16d 146define void @egpr_reg64_as_32_float(float %p) { 147 call void asm sideeffect "# REG: $0", "{r16}"(float %p) 148 ret void 149} 150 151; CHECK-LABEL: egpr_reg64_as_16: 152; CHECK: # REG: %r17w 153define void @egpr_reg64_as_16(i16 %p) { 154 call void asm sideeffect "# REG: $0", "{r17}"(i16 %p) 155 ret void 156} 157 158; CHECK-LABEL: egpr_reg64_as_8: 159; CHECK: # REG: %r21b 160define void @egpr_reg64_as_8(i8 %p) { 161 call void asm sideeffect "# REG: $0", "{r21}"(i8 %p) 162 ret void 163} 164 165; CHECK-LABEL: egpr_reg32_as_16: 166; CHECK: # REG: %r21w 167define void @egpr_reg32_as_16(i16 %p) { 168 call void asm sideeffect "# REG: $0", "{r21d}"(i16 %p) 169 ret void 170} 171 172; CHECK-LABEL: egpr_reg32_as_8: 173; CHECK: # REG: %r20b 174define void @egpr_reg32_as_8(i8 %p) { 175 call void asm sideeffect "# REG: $0", "{r20d}"(i8 %p) 176 ret void 177} 178 179; CHECK-LABEL: egpr_reg16_as_8: 180; CHECK: # REG: %r17b 181define void @egpr_reg16_as_8(i8 %p) { 182 call void asm sideeffect "# REG: $0", "{r17w}"(i8 %p) 183 ret void 184} 185 186; CHECK-LABEL: egpr_reg32_as_64: 187; CHECK: # REG: %r21 188define void @egpr_reg32_as_64(i64 %p) { 189 call void asm sideeffect "# REG: $0", "{r21d}"(i64 %p) 190 ret void 191} 192 193; CHECK-LABEL: egpr_reg32_as_64_float: 194; CHECK: # REG: %r21 195define void @egpr_reg32_as_64_float(double %p) { 196 call void asm sideeffect "# REG: $0", "{r21d}"(double %p) 197 ret void 198} 199 200; CHECK-LABEL: egpr_reg16_as_64: 201; CHECK: # REG: %r21 202define void @egpr_reg16_as_64(i64 %p) { 203 call void asm sideeffect "# REG: $0", "{r21w}"(i64 %p) 204 ret void 205} 206 207; CHECK-LABEL: egpr_reg16_as_64_float: 208; CHECK: # REG: %r21 209define void @egpr_reg16_as_64_float(double %p) { 210 call void asm sideeffect "# REG: $0", "{r21w}"(double %p) 211 ret void 212} 213 214; CHECK-LABEL: egpr_reg8_as_64: 215; CHECK: # REG: %r16 216define void @egpr_reg8_as_64(i64 %p) { 217 call void asm sideeffect "# REG: $0", "{r16b}"(i64 %p) 218 ret void 219} 220 221; CHECK-LABEL: egpr_reg8_as_64_float: 222; CHECK: # REG: %r16 223define void @egpr_reg8_as_64_float(double %p) { 224 call void asm sideeffect "# REG: $0", "{r16b}"(double %p) 225 ret void 226} 227 228; CHECK-LABEL: egpr_reg16_as_32: 229; CHECK: # REG: %r19d 230define void @egpr_reg16_as_32(i32 %p) { 231 call void asm sideeffect "# REG: $0", "{r19w}"(i32 %p) 232 ret void 233} 234 235; CHECK-LABEL: egpr_reg16_as_32_float: 236; CHECK: # REG: %r19d 237define void @egpr_reg16_as_32_float(float %p) { 238 call void asm sideeffect "# REG: $0", "{r19w}"(float %p) 239 ret void 240} 241 242; CHECK-LABEL: egpr_reg8_as_32: 243; CHECK: # REG: %r17d 244define void @egpr_reg8_as_32(i32 %p) { 245 call void asm sideeffect "# REG: $0", "{r17b}"(i32 %p) 246 ret void 247} 248 249; CHECK-LABEL: egpr_reg8_as_32_float: 250; CHECK: # REG: %r17d 251define void @egpr_reg8_as_32_float(float %p) { 252 call void asm sideeffect "# REG: $0", "{r17b}"(float %p) 253 ret void 254} 255 256; CHECK-LABEL: egpr_reg8_as_16: 257; CHECK: # REG: %r18w 258define void @egpr_reg8_as_16(i16 %p) { 259 call void asm sideeffect "# REG: $0", "{r18b}"(i16 %p) 260 ret void 261} 262