xref: /llvm-project/llvm/test/CodeGen/X86/andimm8.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-pc-linux-gnu -show-mc-encoding | FileCheck %s --check-prefix=X86
3; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s --check-prefix=X64
4
5; PR8365
6
7define i64 @bra(i32 %zed) nounwind {
8; X86-LABEL: bra:
9; X86:       # %bb.0:
10; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
11; X86-NEXT:    andl $-64, %eax # encoding: [0x83,0xe0,0xc0]
12; X86-NEXT:    xorl %edx, %edx # encoding: [0x31,0xd2]
13; X86-NEXT:    retl # encoding: [0xc3]
14;
15; X64-LABEL: bra:
16; X64:       # %bb.0:
17; X64-NEXT:    movl %edi, %eax # encoding: [0x89,0xf8]
18; X64-NEXT:    andl $-64, %eax # encoding: [0x83,0xe0,0xc0]
19; X64-NEXT:    retq # encoding: [0xc3]
20 %t1 = zext i32 %zed to i64
21 %t2 = and i64  %t1, 4294967232
22 ret i64 %t2
23}
24
25define void @foo(i64 %zed, ptr %x) nounwind {
26; X86-LABEL: foo:
27; X86:       # %bb.0:
28; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x0c]
29; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
30; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx # encoding: [0x8b,0x54,0x24,0x08]
31; X86-NEXT:    andl $-4, %ecx # encoding: [0x83,0xe1,0xfc]
32; X86-NEXT:    orl $2, %ecx # encoding: [0x83,0xc9,0x02]
33; X86-NEXT:    movl %edx, 4(%eax) # encoding: [0x89,0x50,0x04]
34; X86-NEXT:    movl %ecx, (%eax) # encoding: [0x89,0x08]
35; X86-NEXT:    retl # encoding: [0xc3]
36;
37; X64-LABEL: foo:
38; X64:       # %bb.0:
39; X64-NEXT:    andq $-4, %rdi # encoding: [0x48,0x83,0xe7,0xfc]
40; X64-NEXT:    orq $2, %rdi # encoding: [0x48,0x83,0xcf,0x02]
41; X64-NEXT:    movq %rdi, (%rsi) # encoding: [0x48,0x89,0x3e]
42; X64-NEXT:    retq # encoding: [0xc3]
43  %t1 = and i64 %zed, -4
44  %t2 = or i64 %t1, 2
45  store i64 %t2, ptr %x, align 8
46  ret void
47}
48
49define i64 @bar(i64 %zed) nounwind {
50; X86-LABEL: bar:
51; X86:       # %bb.0:
52; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
53; X86-NEXT:    andl $42, %eax # encoding: [0x83,0xe0,0x2a]
54; X86-NEXT:    xorl %edx, %edx # encoding: [0x31,0xd2]
55; X86-NEXT:    retl # encoding: [0xc3]
56;
57; X64-LABEL: bar:
58; X64:       # %bb.0:
59; X64-NEXT:    movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
60; X64-NEXT:    andl $42, %eax # encoding: [0x83,0xe0,0x2a]
61; X64-NEXT:    retq # encoding: [0xc3]
62  %t1 = and i64 %zed, 42
63  ret i64 %t1
64}
65
66define i64 @baz(i64 %zed) nounwind {
67; X86-LABEL: baz:
68; X86:       # %bb.0:
69; X86-NEXT:    movl $2147483647, %eax # encoding: [0xb8,0xff,0xff,0xff,0x7f]
70; X86-NEXT:    # imm = 0x7FFFFFFF
71; X86-NEXT:    andl {{[0-9]+}}(%esp), %eax # encoding: [0x23,0x44,0x24,0x04]
72; X86-NEXT:    xorl %edx, %edx # encoding: [0x31,0xd2]
73; X86-NEXT:    retl # encoding: [0xc3]
74;
75; X64-LABEL: baz:
76; X64:       # %bb.0:
77; X64-NEXT:    movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
78; X64-NEXT:    andl $2147483647, %eax # encoding: [0x25,0xff,0xff,0xff,0x7f]
79; X64-NEXT:    # imm = 0x7FFFFFFF
80; X64-NEXT:    retq # encoding: [0xc3]
81  %t1 = and i64 %zed, 2147483647
82  ret i64 %t1
83}
84