xref: /llvm-project/llvm/test/CodeGen/X86/and-shift.ll (revision e9caa37e9c69f6a6e5ab59d33b9d492054819ded)
13a0d5d84SKazu Hirata; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
284547ec4SSimon Pilgrim; RUN: llc < %s -mtriple=i386-unknown-unknown   | FileCheck %s --check-prefixes=X86
384547ec4SSimon Pilgrim; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
484547ec4SSimon Pilgrim; RUN: llc < %s -mtriple=x86_64-unknown-gnux32 | FileCheck %s --check-prefixes=X64
53a0d5d84SKazu Hirata
63a0d5d84SKazu Hiratadefine i32 @shift30_and2_i32(i32 %x) {
784547ec4SSimon Pilgrim; X86-LABEL: shift30_and2_i32:
884547ec4SSimon Pilgrim; X86:       # %bb.0:
984547ec4SSimon Pilgrim; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
1084547ec4SSimon Pilgrim; X86-NEXT:    shrl $30, %eax
1184547ec4SSimon Pilgrim; X86-NEXT:    andl $-2, %eax
1284547ec4SSimon Pilgrim; X86-NEXT:    retl
133a0d5d84SKazu Hirata;
143a0d5d84SKazu Hirata; X64-LABEL: shift30_and2_i32:
153a0d5d84SKazu Hirata; X64:       # %bb.0:
163a0d5d84SKazu Hirata; X64-NEXT:    movl %edi, %eax
173a0d5d84SKazu Hirata; X64-NEXT:    shrl $30, %eax
183a0d5d84SKazu Hirata; X64-NEXT:    andl $-2, %eax
193a0d5d84SKazu Hirata; X64-NEXT:    retq
203a0d5d84SKazu Hirata  %shr = lshr i32 %x, 30
213a0d5d84SKazu Hirata  %and = and i32 %shr, 2
223a0d5d84SKazu Hirata  ret i32 %and
233a0d5d84SKazu Hirata}
243a0d5d84SKazu Hirata
253a0d5d84SKazu Hiratadefine i64 @shift62_and2_i64(i64 %x) {
2684547ec4SSimon Pilgrim; X86-LABEL: shift62_and2_i64:
2784547ec4SSimon Pilgrim; X86:       # %bb.0:
2884547ec4SSimon Pilgrim; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
2984547ec4SSimon Pilgrim; X86-NEXT:    shrl $30, %eax
3084547ec4SSimon Pilgrim; X86-NEXT:    andl $-2, %eax
3184547ec4SSimon Pilgrim; X86-NEXT:    xorl %edx, %edx
3284547ec4SSimon Pilgrim; X86-NEXT:    retl
333a0d5d84SKazu Hirata;
343a0d5d84SKazu Hirata; X64-LABEL: shift62_and2_i64:
353a0d5d84SKazu Hirata; X64:       # %bb.0:
363a0d5d84SKazu Hirata; X64-NEXT:    movq %rdi, %rax
373a0d5d84SKazu Hirata; X64-NEXT:    shrq $62, %rax
383a0d5d84SKazu Hirata; X64-NEXT:    andl $-2, %eax
393a0d5d84SKazu Hirata; X64-NEXT:    retq
403a0d5d84SKazu Hirata  %shr = lshr i64 %x, 62
413a0d5d84SKazu Hirata  %and = and i64 %shr, 2
423a0d5d84SKazu Hirata  ret i64 %and
433a0d5d84SKazu Hirata}
443a0d5d84SKazu Hirata
453a0d5d84SKazu Hiratadefine i64 @shift30_and2_i64(i64 %x) {
4684547ec4SSimon Pilgrim; X86-LABEL: shift30_and2_i64:
4784547ec4SSimon Pilgrim; X86:       # %bb.0:
4884547ec4SSimon Pilgrim; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
4984547ec4SSimon Pilgrim; X86-NEXT:    shrl $30, %eax
5084547ec4SSimon Pilgrim; X86-NEXT:    andl $-2, %eax
5184547ec4SSimon Pilgrim; X86-NEXT:    xorl %edx, %edx
5284547ec4SSimon Pilgrim; X86-NEXT:    retl
533a0d5d84SKazu Hirata;
543a0d5d84SKazu Hirata; X64-LABEL: shift30_and2_i64:
553a0d5d84SKazu Hirata; X64:       # %bb.0:
563a0d5d84SKazu Hirata; X64-NEXT:    movq %rdi, %rax
57*e9caa37eSSimon Pilgrim; X64-NEXT:    shrl $30, %eax
58*e9caa37eSSimon Pilgrim; X64-NEXT:    andl $-2, %eax
593a0d5d84SKazu Hirata; X64-NEXT:    retq
603a0d5d84SKazu Hirata  %shr = lshr i64 %x, 30
613a0d5d84SKazu Hirata  %and = and i64 %shr, 2
623a0d5d84SKazu Hirata  ret i64 %and
633a0d5d84SKazu Hirata}
64