xref: /llvm-project/llvm/test/CodeGen/X86/amx-tf32-internal.ll (revision eddb79d56dd50bc6832c7d906ab4a0df2ae1d846)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+avx512f, \
3; RUN: -mattr=+amx-tf32,+amx-transpose -verify-machineinstrs | FileCheck %s
4
5define void @test_amx(i8* %pointer, i8* %base, i64 %stride) {
6; CHECK-LABEL: test_amx:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
9; CHECK-NEXT:    vmovups %zmm0, -{{[0-9]+}}(%rsp)
10; CHECK-NEXT:    movb $1, -{{[0-9]+}}(%rsp)
11; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
12; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
13; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
14; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
15; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
16; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
17; CHECK-NEXT:    ldtilecfg -{{[0-9]+}}(%rsp)
18; CHECK-NEXT:    movw $8, %ax
19; CHECK-NEXT:    tileloadd (%rsi,%rdx), %tmm0
20; CHECK-NEXT:    tilezero %tmm1
21; CHECK-NEXT:    tilezero %tmm2
22; CHECK-NEXT:    tmmultf32ps %tmm1, %tmm0, %tmm2
23; CHECK-NEXT:    ttmmultf32ps %tmm1, %tmm0, %tmm2
24; CHECK-NEXT:    tilestored %tmm2, (%rdi,%rdx)
25; CHECK-NEXT:    tilerelease
26; CHECK-NEXT:    vzeroupper
27; CHECK-NEXT:    retq
28
29  %a = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, i8* %base, i64 %stride)
30  %b = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 8)
31  %c = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 8)
32
33  %c1 = call x86_amx @llvm.x86.tmmultf32ps.internal(i16 8, i16 8, i16 8, x86_amx %c, x86_amx %a, x86_amx %b)
34  %c2 = call x86_amx @llvm.x86.ttmmultf32ps.internal(i16 8, i16 8, i16 8, x86_amx %c1, x86_amx %a, x86_amx %b)
35
36  call void @llvm.x86.tilestored64.internal(i16 8, i16 8, i8* %pointer, i64 %stride, x86_amx %c2)
37  ret void
38}
39
40declare x86_amx @llvm.x86.tilezero.internal(i16, i16)
41declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64)
42declare void @llvm.x86.tilestored64.internal(i16, i16, i8*, i64, x86_amx)
43
44
45declare x86_amx @llvm.x86.tmmultf32ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
46declare x86_amx @llvm.x86.ttmmultf32ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
47