1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-- | FileCheck %s 3; PR964 4 5define ptr @FindChar(ptr %CurPtr) { 6; CHECK-LABEL: FindChar: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: pushl %edi 9; CHECK-NEXT: .cfi_def_cfa_offset 8 10; CHECK-NEXT: pushl %esi 11; CHECK-NEXT: .cfi_def_cfa_offset 12 12; CHECK-NEXT: .cfi_offset %esi, -12 13; CHECK-NEXT: .cfi_offset %edi, -8 14; CHECK-NEXT: xorl %edi, %edi 15; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi 16; CHECK-NEXT: .p2align 4 17; CHECK-NEXT: .LBB0_1: # %bb 18; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 19; CHECK-NEXT: movzbl (%esi,%edi), %eax 20; CHECK-NEXT: incl %edi 21; CHECK-NEXT: cmpl $120, %eax 22; CHECK-NEXT: je .LBB0_3 23; CHECK-NEXT: # %bb.2: # %bb 24; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 25; CHECK-NEXT: testl %eax, %eax 26; CHECK-NEXT: jne .LBB0_1 27; CHECK-NEXT: .LBB0_3: # %bb7 28; CHECK-NEXT: movzbl %al, %eax 29; CHECK-NEXT: pushl %eax 30; CHECK-NEXT: .cfi_adjust_cfa_offset 4 31; CHECK-NEXT: calll foo@PLT 32; CHECK-NEXT: addl $4, %esp 33; CHECK-NEXT: .cfi_adjust_cfa_offset -4 34; CHECK-NEXT: addl %edi, %esi 35; CHECK-NEXT: movl %esi, %eax 36; CHECK-NEXT: popl %esi 37; CHECK-NEXT: .cfi_def_cfa_offset 8 38; CHECK-NEXT: popl %edi 39; CHECK-NEXT: .cfi_def_cfa_offset 4 40; CHECK-NEXT: retl 41entry: 42 br label %bb 43 44bb: ; preds = %bb, %entry 45 %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3] 46 %CurPtr_addr.0.rec = bitcast i32 %indvar to i32 ; <i32> [#uses=1] 47 %gep.upgrd.1 = zext i32 %indvar to i64 ; <i64> [#uses=1] 48 %CurPtr_addr.0 = getelementptr i8, ptr %CurPtr, i64 %gep.upgrd.1 ; <ptr> [#uses=1] 49 %tmp = load i8, ptr %CurPtr_addr.0 ; <i8> [#uses=3] 50 %tmp2.rec = add i32 %CurPtr_addr.0.rec, 1 ; <i32> [#uses=1] 51 %tmp2 = getelementptr i8, ptr %CurPtr, i32 %tmp2.rec ; <ptr> [#uses=1] 52 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] 53 switch i8 %tmp, label %bb [ 54 i8 0, label %bb7 55 i8 120, label %bb7 56 ] 57 58bb7: ; preds = %bb, %bb 59 tail call void @foo( i8 %tmp ) 60 ret ptr %tmp2 61} 62 63declare void @foo(i8) 64 65; PR50080 66; The important part of this test is that we emit only 1 bit test rather than 67; 2 since the default BB of the switch is unreachable. 68define i32 @baz(i32 %0) { 69; CHECK-LABEL: baz: 70; CHECK: # %bb.0: 71; CHECK-NEXT: xorl %eax, %eax 72; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 73; CHECK-NEXT: movl $13056, %edx # imm = 0x3300 74; CHECK-NEXT: btl %ecx, %edx 75; CHECK-NEXT: jae .LBB1_1 76; CHECK-NEXT: # %bb.2: # %return 77; CHECK-NEXT: retl 78; CHECK-NEXT: .LBB1_1: # %sw.epilog8 79; CHECK-NEXT: movl $1, %eax 80; CHECK-NEXT: retl 81 switch i32 %0, label %if.then.unreachabledefault [ 82 i32 4, label %sw.epilog8 83 i32 5, label %sw.epilog8 84 i32 8, label %sw.bb2 85 i32 9, label %sw.bb2 86 i32 12, label %sw.bb4 87 i32 13, label %sw.bb4 88 ] 89 90sw.bb2: 91 br label %return 92 93sw.bb4: 94 br label %return 95 96sw.epilog8: 97 br label %return 98 99if.then.unreachabledefault: 100 unreachable 101 102return: 103 %retval.0 = phi i32 [ 1, %sw.epilog8 ], [ 0, %sw.bb2 ], [ 0, %sw.bb4 ] 104 ret i32 %retval.0 105} 106