xref: /llvm-project/llvm/test/CodeGen/X86/AMX/amx-tile-complex-internals.ll (revision 6e83c0a1cbfdb0c0f13c282312c47c7945970f55)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-bf16,+avx512f, \
3; RUN: -mattr=+amx-complex \
4; RUN: -verify-machineinstrs | FileCheck %s
5
6define void @test_amx(ptr %pointer, ptr %base, i64 %stride) {
7; CHECK-LABEL: test_amx:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
10; CHECK-NEXT:    vmovups %zmm0, -{{[0-9]+}}(%rsp)
11; CHECK-NEXT:    movb $1, -{{[0-9]+}}(%rsp)
12; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
13; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
14; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
15; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
16; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
17; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
18; CHECK-NEXT:    ldtilecfg -{{[0-9]+}}(%rsp)
19; CHECK-NEXT:    movw $8, %ax
20; CHECK-NEXT:    tileloadd (%rsi,%rdx), %tmm0
21; CHECK-NEXT:    tilezero %tmm1
22; CHECK-NEXT:    tilezero %tmm2
23; CHECK-NEXT:    tcmmimfp16ps %tmm1, %tmm0, %tmm2
24; CHECK-NEXT:    tcmmrlfp16ps %tmm1, %tmm0, %tmm2
25; CHECK-NEXT:    tilestored %tmm2, (%rdi,%rdx)
26; CHECK-NEXT:    tilerelease
27; CHECK-NEXT:    vzeroupper
28; CHECK-NEXT:    retq
29
30  %a = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, ptr %base, i64 %stride)
31  %b = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 8)
32  %c = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 8)
33
34  %c1 = call x86_amx @llvm.x86.tcmmimfp16ps.internal(i16 8, i16 8, i16 8, x86_amx %c, x86_amx %a, x86_amx %b)
35  %c2 = call x86_amx @llvm.x86.tcmmrlfp16ps.internal(i16 8, i16 8, i16 8, x86_amx %c1, x86_amx %a, x86_amx %b)
36
37  call void @llvm.x86.tilestored64.internal(i16 8, i16 8, ptr %pointer, i64 %stride, x86_amx %c2)
38  ret void
39}
40
41declare x86_amx @llvm.x86.tilezero.internal(i16, i16)
42declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)
43declare x86_amx @llvm.x86.tileloaddt164.internal(i16, i16, ptr, i64)
44declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx)
45
46declare x86_amx @llvm.x86.tcmmimfp16ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
47declare x86_amx @llvm.x86.tcmmrlfp16ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
48