xref: /llvm-project/llvm/test/CodeGen/X86/AMX/amx-spill.ll (revision 7b3bbd83c0c24087072ec5b22a76799ab31f87d5) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
3
4@buf = dso_local global [1024 x i8] zeroinitializer, align 64
5@buf2 = dso_local global [1024 x i8] zeroinitializer, align 64
6
7define dso_local void @test_api(i32 %0, i16 signext %1, i16 signext %2) nounwind {
8; CHECK-LABEL: test_api:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    subq $968, %rsp # imm = 0x3C8
11; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
12; CHECK-NEXT:    vmovups %zmm0, -{{[0-9]+}}(%rsp)
13; CHECK-NEXT:    movb $1, -{{[0-9]+}}(%rsp)
14; CHECK-NEXT:    movw %dx, -{{[0-9]+}}(%rsp)
15; CHECK-NEXT:    movb %sil, -{{[0-9]+}}(%rsp)
16; CHECK-NEXT:    movw %si, -{{[0-9]+}}(%rsp)
17; CHECK-NEXT:    movb %sil, -{{[0-9]+}}(%rsp)
18; CHECK-NEXT:    movw %dx, -{{[0-9]+}}(%rsp)
19; CHECK-NEXT:    movb %dl, -{{[0-9]+}}(%rsp)
20; CHECK-NEXT:    movw %dx, -{{[0-9]+}}(%rsp)
21; CHECK-NEXT:    movb %dl, -{{[0-9]+}}(%rsp)
22; CHECK-NEXT:    movw %dx, -{{[0-9]+}}(%rsp)
23; CHECK-NEXT:    movb %sil, -{{[0-9]+}}(%rsp)
24; CHECK-NEXT:    movw %dx, -{{[0-9]+}}(%rsp)
25; CHECK-NEXT:    movb %dl, -{{[0-9]+}}(%rsp)
26; CHECK-NEXT:    movw %dx, -{{[0-9]+}}(%rsp)
27; CHECK-NEXT:    movb %sil, -{{[0-9]+}}(%rsp)
28; CHECK-NEXT:    movw %dx, -{{[0-9]+}}(%rsp)
29; CHECK-NEXT:    movb %dl, -{{[0-9]+}}(%rsp)
30; CHECK-NEXT:    ldtilecfg -{{[0-9]+}}(%rsp)
31; CHECK-NEXT:    movl $buf, %ecx
32; CHECK-NEXT:    movl $32, %eax
33; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm1
34; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm1
35; CHECK-NEXT:    movabsq $64, %r8
36; CHECK-NEXT:    tilestored %tmm1, -64(%rsp,%r8) # 1024-byte Folded Spill
37; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm3
38; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm4
39; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm2
40; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm5
41; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm0
42; CHECK-NEXT:    testl %edi, %edi
43; CHECK-NEXT:    jne .LBB0_2
44; CHECK-NEXT:  # %bb.1:
45; CHECK-NEXT:    movl $buf2, %ecx
46; CHECK-NEXT:  .LBB0_2:
47; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm6
48; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm7
49; CHECK-NEXT:    tileloadd (%rcx,%rax), %tmm1
50; CHECK-NEXT:    tdpbssd %tmm7, %tmm6, %tmm1
51; CHECK-NEXT:    movabsq $64, %rax
52; CHECK-NEXT:    tileloadd -64(%rsp,%rax), %tmm7 # 1024-byte Folded Reload
53; CHECK-NEXT:    tdpbssd %tmm7, %tmm1, %tmm3
54; CHECK-NEXT:    tdpbssd %tmm4, %tmm3, %tmm2
55; CHECK-NEXT:    tdpbssd %tmm5, %tmm2, %tmm0
56; CHECK-NEXT:    movl $buf, %eax
57; CHECK-NEXT:    movl $32, %ecx
58; CHECK-NEXT:    tilestored %tmm0, (%rax,%rcx)
59; CHECK-NEXT:    addq $968, %rsp # imm = 0x3C8
60; CHECK-NEXT:    tilerelease
61; CHECK-NEXT:    vzeroupper
62; CHECK-NEXT:    retq
63  %4 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %2, ptr @buf, i64 32)
64  %5 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %2, ptr @buf, i64 32)
65  %6 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %2, ptr @buf, i64 32)
66  %7 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %2, i16 %2, ptr @buf, i64 32)
67  %8 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %2, i16 %2, ptr @buf, i64 32)
68  %9 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %2, i16 %2, ptr @buf, i64 32)
69  %10 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %2, i16 %2, ptr @buf, i64 32)
70  %11 = icmp eq i32 %0, 0
71  br i1 %11, label %16, label %12
72
7312:                                               ; preds = %3
74  %13 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %1, ptr @buf, i64 32)
75  %14 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %2, ptr @buf, i64 32)
76  %15 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %2, ptr @buf, i64 32)
77  br label %20
78
7916:                                               ; preds = %3
80  %17 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %1, ptr @buf2, i64 32)
81  %18 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %2, ptr @buf2, i64 32)
82  %19 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %1, i16 %2, ptr @buf2, i64 32)
83  br label %20
84
8520:                                               ; preds = %16, %12
86  %21 = phi x86_amx [ %17, %16 ], [ %13, %12 ]
87  %22 = phi x86_amx [ %18, %16 ], [ %14, %12 ]
88  %23 = phi x86_amx [ %19, %16 ], [ %15, %12 ]
89  %24 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %1, i16 %2, i16 %1, x86_amx %23, x86_amx %21, x86_amx %22)
90  %25 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %1, i16 %2, i16 %2, x86_amx %6, x86_amx %24, x86_amx %5)
91  %26 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %1, i16 %2, i16 %2, x86_amx %8, x86_amx %25, x86_amx %7)
92  %27 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %2, i16 %2, i16 %2, x86_amx %10, x86_amx %26, x86_amx %9)
93  tail call void @llvm.x86.tilestored64.internal(i16 %2, i16 %2, ptr @buf, i64 32, x86_amx %27)
94  ret void
95}
96
97declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)
98declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
99declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx)
100