xref: /llvm-project/llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll (revision 858d6a15a0baea233c032e5048968f1cfbbed876)
1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
2
3; Test that a splat shuffle of an fp-to-int bitcasted vector correctly
4; optimizes and lowers to a single splat instruction.
5
6target triple = "wasm32-unknown-unknown"
7
8; CHECK-LABEL: f32x4_splat:
9; CHECK-NEXT: .functype f32x4_splat (f32) -> (v128){{$}}
10; CHECK-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
11; CHECK-NEXT: return $pop[[R]]{{$}}
12define <4 x i32> @f32x4_splat(float %x) {
13  %vecinit = insertelement <4 x float> undef, float %x, i32 0
14  %a = bitcast <4 x float> %vecinit to <4 x i32>
15  %b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
16  ret <4 x i32> %b
17}
18
19; CHECK-LABEL: i2x2_splat:
20; CHECK-NEXT: .functype i2x2_splat (i32) -> (v128){{$}}
21define <2 x i2> @i2x2_splat(i1 %x) {
22  %vecinit = insertelement <4 x i1> undef, i1 %x, i32 0
23  %a = bitcast <4 x i1> %vecinit to <2 x i2>
24  %b = shufflevector <2 x i2> %a, <2 x i2> undef, <2 x i32> zeroinitializer
25  ret <2 x i2> %b
26}
27
28; CHECK-LABEL: not_a_vec:
29; CHECK-NEXT: .functype not_a_vec (i64, i64) -> (v128){{$}}
30; CHECK-NEXT: i32.wrap_i64    $push[[L:[0-9]+]]=, $0
31; CHECK-NEXT: i32x4.splat     $push[[R:[0-9]+]]=, $pop[[L]]
32; CHECK-NEXT: return $pop[[R]]
33define <4 x i32> @not_a_vec(i128 %x) {
34  %a = bitcast i128 %x to <4 x i32>
35  %b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
36  ret <4 x i32> %b
37}
38