1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s 2 3; Test that SIMD shifts can be lowered correctly even with shift 4; values that are more complex than plain splats. 5 6target triple = "wasm32-unknown-unknown" 7 8; CHECK-LABEL: shl_add: 9; CHECK-NEXT: .functype shl_add (v128, i32, i32) -> (v128) 10; CHECK-NEXT: i32.add $push0=, $1, $2 11; CHECK-NEXT: i8x16.shl $push1=, $0, $pop0 12; CHECK-NEXT: return $pop1 13define <16 x i8> @shl_add(<16 x i8> %v, i8 %a, i8 %b) { 14 %t1 = insertelement <16 x i8> undef, i8 %a, i32 0 15 %va = shufflevector <16 x i8> %t1, <16 x i8> undef, <16 x i32> zeroinitializer 16 %t2 = insertelement <16 x i8> undef, i8 %b, i32 0 17 %vb = shufflevector <16 x i8> %t2, <16 x i8> undef, <16 x i32> zeroinitializer 18 %shift = add <16 x i8> %va, %vb 19 %r = shl <16 x i8> %v, %shift 20 ret <16 x i8> %r 21} 22 23; CHECK-LABEL: shl_abs: 24; CHECK-NEXT: .functype shl_abs (v128, i32) -> (v128) 25; CHECK-NEXT: i8x16.splat $push0=, $1 26; CHECK-NEXT: i8x16.abs $push1=, $pop0 27; CHECK-NEXT: i8x16.extract_lane_u $push2=, $pop1, 0 28; CHECK-NEXT: i8x16.shl $push3=, $0, $pop2 29; CHECK-NEXT: return $pop3 30define <16 x i8> @shl_abs(<16 x i8> %v, i8 %a) { 31 %t1 = insertelement <16 x i8> undef, i8 %a, i32 0 32 %va = shufflevector <16 x i8> %t1, <16 x i8> undef, <16 x i32> zeroinitializer 33 %nva = sub <16 x i8> zeroinitializer, %va 34 %c = icmp sgt <16 x i8> %va, zeroinitializer 35 %shift = select <16 x i1> %c, <16 x i8> %va, <16 x i8> %nva 36 %r = shl <16 x i8> %v, %shift 37 ret <16 x i8> %r 38} 39 40; CHECK-LABEL: shl_abs_add: 41; CHECK-NEXT: .functype shl_abs_add (v128, i32, i32) -> (v128) 42; CHECK-NEXT: i32.add $push0=, $1, $2 43; CHECK-NEXT: i8x16.splat $push1=, $pop0 44; CHECK-NEXT: i8x16.abs $push2=, $pop1 45; CHECK-NEXT: i8x16.extract_lane_u $push3=, $pop2, 0 46; CHECK-NEXT: i8x16.shl $push4=, $0, $pop3 47; CHECK-NEXT: return $pop4 48 49define <16 x i8> @shl_abs_add(<16 x i8> %v, i8 %a, i8 %b) { 50 %t1 = insertelement <16 x i8> undef, i8 %a, i32 0 51 %va = shufflevector <16 x i8> %t1, <16 x i8> undef, <16 x i32> zeroinitializer 52 %t2 = insertelement <16 x i8> undef, i8 %b, i32 0 53 %vb = shufflevector <16 x i8> %t2, <16 x i8> undef, <16 x i32> zeroinitializer 54 %vadd = add <16 x i8> %va, %vb 55 %nvadd = sub <16 x i8> zeroinitializer, %vadd 56 %c = icmp sgt <16 x i8> %vadd, zeroinitializer 57 %shift = select <16 x i1> %c, <16 x i8> %vadd, <16 x i8> %nvadd 58 %r = shl <16 x i8> %v, %shift 59 ret <16 x i8> %r 60} 61