xref: /llvm-project/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll (revision 73856247eef35f5336e485dc009842a5b991c421)
1; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
2
3; Test loads and stores with custom alignment values.
4
5target triple = "wasm32-unknown-unknown"
6
7;===----------------------------------------------------------------------------
8; Loads
9;===----------------------------------------------------------------------------
10
11; CHECK-LABEL: ldi64_a1:
12; CHECK-NEXT: .functype ldi64_a1 (i32) -> (i64){{$}}
13; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
14; CHECK-NEXT: return $pop[[NUM]]{{$}}
15define i64 @ldi64_a1(ptr %p) {
16  %v = load i64, ptr %p, align 1
17  ret i64 %v
18}
19
20; CHECK-LABEL: ldi64_a2:
21; CHECK-NEXT: .functype ldi64_a2 (i32) -> (i64){{$}}
22; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}}
23; CHECK-NEXT: return $pop[[NUM]]{{$}}
24define i64 @ldi64_a2(ptr %p) {
25  %v = load i64, ptr %p, align 2
26  ret i64 %v
27}
28
29; CHECK-LABEL: ldi64_a4:
30; CHECK-NEXT: .functype ldi64_a4 (i32) -> (i64){{$}}
31; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=2{{$}}
32; CHECK-NEXT: return $pop[[NUM]]{{$}}
33define i64 @ldi64_a4(ptr %p) {
34  %v = load i64, ptr %p, align 4
35  ret i64 %v
36}
37
38; 8 is the default alignment for i64 so no attribute is needed.
39
40; CHECK-LABEL: ldi64_a8:
41; CHECK-NEXT: .functype ldi64_a8 (i32) -> (i64){{$}}
42; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
43; CHECK-NEXT: return $pop[[NUM]]{{$}}
44define i64 @ldi64_a8(ptr %p) {
45  %v = load i64, ptr %p, align 8
46  ret i64 %v
47}
48
49; The default alignment in LLVM is the same as the default alignment in wasm.
50
51; CHECK-LABEL: ldi64:
52; CHECK-NEXT: .functype ldi64 (i32) -> (i64){{$}}
53; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
54; CHECK-NEXT: return $pop[[NUM]]{{$}}
55define i64 @ldi64(ptr %p) {
56  %v = load i64, ptr %p
57  ret i64 %v
58}
59
60; 16 is greater than the default alignment so it is ignored.
61
62; CHECK-LABEL: ldi64_a16:
63; CHECK-NEXT: .functype ldi64_a16 (i32) -> (i64){{$}}
64; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
65; CHECK-NEXT: return $pop[[NUM]]{{$}}
66define i64 @ldi64_a16(ptr %p) {
67  %v = load i64, ptr %p, align 16
68  ret i64 %v
69}
70
71;===----------------------------------------------------------------------------
72; Extending loads
73;===----------------------------------------------------------------------------
74
75; CHECK-LABEL: ldi8_a1:
76; CHECK-NEXT: .functype ldi8_a1 (i32) -> (i64){{$}}
77; CHECK-NEXT: i64.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
78; CHECK-NEXT: return $pop[[NUM]]{{$}}
79define i64 @ldi8_a1(ptr %p) {
80  %v = load i8, ptr %p, align 1
81  %w = zext i8 %v to i64
82  ret i64 %w
83}
84
85; CHECK-LABEL: ldi8_a2:
86; CHECK-NEXT: .functype ldi8_a2 (i32) -> (i64){{$}}
87; CHECK-NEXT: i64.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
88; CHECK-NEXT: return $pop[[NUM]]{{$}}
89define i64 @ldi8_a2(ptr %p) {
90  %v = load i8, ptr %p, align 2
91  %w = zext i8 %v to i64
92  ret i64 %w
93}
94
95; CHECK-LABEL: ldi16_a1:
96; CHECK-NEXT: .functype ldi16_a1 (i32) -> (i64){{$}}
97; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
98; CHECK-NEXT: return $pop[[NUM]]{{$}}
99define i64 @ldi16_a1(ptr %p) {
100  %v = load i16, ptr %p, align 1
101  %w = zext i16 %v to i64
102  ret i64 %w
103}
104
105; CHECK-LABEL: ldi16_a2:
106; CHECK-NEXT: .functype ldi16_a2 (i32) -> (i64){{$}}
107; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
108; CHECK-NEXT: return $pop[[NUM]]{{$}}
109define i64 @ldi16_a2(ptr %p) {
110  %v = load i16, ptr %p, align 2
111  %w = zext i16 %v to i64
112  ret i64 %w
113}
114
115; CHECK-LABEL: ldi16_a4:
116; CHECK-NEXT: .functype ldi16_a4 (i32) -> (i64){{$}}
117; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
118; CHECK-NEXT: return $pop[[NUM]]{{$}}
119define i64 @ldi16_a4(ptr %p) {
120  %v = load i16, ptr %p, align 4
121  %w = zext i16 %v to i64
122  ret i64 %w
123}
124
125; CHECK-LABEL: ldi32_a1:
126; CHECK-NEXT: .functype ldi32_a1 (i32) -> (i64){{$}}
127; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
128; CHECK-NEXT: return $pop[[NUM]]{{$}}
129define i64 @ldi32_a1(ptr %p) {
130  %v = load i32, ptr %p, align 1
131  %w = zext i32 %v to i64
132  ret i64 %w
133}
134
135; CHECK-LABEL: ldi32_a2:
136; CHECK-NEXT: .functype ldi32_a2 (i32) -> (i64){{$}}
137; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}}
138; CHECK-NEXT: return $pop[[NUM]]{{$}}
139define i64 @ldi32_a2(ptr %p) {
140  %v = load i32, ptr %p, align 2
141  %w = zext i32 %v to i64
142  ret i64 %w
143}
144
145; CHECK-LABEL: ldi32_a4:
146; CHECK-NEXT: .functype ldi32_a4 (i32) -> (i64){{$}}
147; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
148; CHECK-NEXT: return $pop[[NUM]]{{$}}
149define i64 @ldi32_a4(ptr %p) {
150  %v = load i32, ptr %p, align 4
151  %w = zext i32 %v to i64
152  ret i64 %w
153}
154
155; CHECK-LABEL: ldi32_a8:
156; CHECK-NEXT: .functype ldi32_a8 (i32) -> (i64){{$}}
157; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
158; CHECK-NEXT: return $pop[[NUM]]{{$}}
159define i64 @ldi32_a8(ptr %p) {
160  %v = load i32, ptr %p, align 8
161  %w = zext i32 %v to i64
162  ret i64 %w
163}
164
165;===----------------------------------------------------------------------------
166; Stores
167;===----------------------------------------------------------------------------
168
169; CHECK-LABEL: sti64_a1:
170; CHECK-NEXT: .functype sti64_a1 (i32, i64) -> (){{$}}
171; CHECK-NEXT: i64.store 0($0):p2align=0, $1{{$}}
172; CHECK-NEXT: return{{$}}
173define void @sti64_a1(ptr %p, i64 %v) {
174  store i64 %v, ptr %p, align 1
175  ret void
176}
177
178; CHECK-LABEL: sti64_a2:
179; CHECK-NEXT: .functype sti64_a2 (i32, i64) -> (){{$}}
180; CHECK-NEXT: i64.store 0($0):p2align=1, $1{{$}}
181; CHECK-NEXT: return{{$}}
182define void @sti64_a2(ptr %p, i64 %v) {
183  store i64 %v, ptr %p, align 2
184  ret void
185}
186
187; CHECK-LABEL: sti64_a4:
188; CHECK-NEXT: .functype sti64_a4 (i32, i64) -> (){{$}}
189; CHECK-NEXT: i64.store 0($0):p2align=2, $1{{$}}
190; CHECK-NEXT: return{{$}}
191define void @sti64_a4(ptr %p, i64 %v) {
192  store i64 %v, ptr %p, align 4
193  ret void
194}
195
196; 8 is the default alignment for i32 so no attribute is needed.
197
198; CHECK-LABEL: sti64_a8:
199; CHECK-NEXT: .functype sti64_a8 (i32, i64) -> (){{$}}
200; CHECK-NEXT: i64.store 0($0), $1{{$}}
201; CHECK-NEXT: return{{$}}
202define void @sti64_a8(ptr %p, i64 %v) {
203  store i64 %v, ptr %p, align 8
204  ret void
205}
206
207; The default alignment in LLVM is the same as the default alignment in wasm.
208
209; CHECK-LABEL: sti64:
210; CHECK-NEXT: .functype sti64 (i32, i64) -> (){{$}}
211; CHECK-NEXT: i64.store 0($0), $1{{$}}
212; CHECK-NEXT: return{{$}}
213define void @sti64(ptr %p, i64 %v) {
214  store i64 %v, ptr %p
215  ret void
216}
217
218; CHECK-LABEL: sti64_a16:
219; CHECK-NEXT: .functype sti64_a16 (i32, i64) -> (){{$}}
220; CHECK-NEXT: i64.store 0($0), $1{{$}}
221; CHECK-NEXT: return{{$}}
222define void @sti64_a16(ptr %p, i64 %v) {
223  store i64 %v, ptr %p, align 16
224  ret void
225}
226
227;===----------------------------------------------------------------------------
228; Truncating stores
229;===----------------------------------------------------------------------------
230
231; CHECK-LABEL: sti8_a1:
232; CHECK-NEXT: .functype sti8_a1 (i32, i64) -> (){{$}}
233; CHECK-NEXT: i64.store8 0($0), $1{{$}}
234; CHECK-NEXT: return{{$}}
235define void @sti8_a1(ptr %p, i64 %w) {
236  %v = trunc i64 %w to i8
237  store i8 %v, ptr %p, align 1
238  ret void
239}
240
241; CHECK-LABEL: sti8_a2:
242; CHECK-NEXT: .functype sti8_a2 (i32, i64) -> (){{$}}
243; CHECK-NEXT: i64.store8 0($0), $1{{$}}
244; CHECK-NEXT: return{{$}}
245define void @sti8_a2(ptr %p, i64 %w) {
246  %v = trunc i64 %w to i8
247  store i8 %v, ptr %p, align 2
248  ret void
249}
250
251; CHECK-LABEL: sti16_a1:
252; CHECK-NEXT: .functype sti16_a1 (i32, i64) -> (){{$}}
253; CHECK-NEXT: i64.store16 0($0):p2align=0, $1{{$}}
254; CHECK-NEXT: return{{$}}
255define void @sti16_a1(ptr %p, i64 %w) {
256  %v = trunc i64 %w to i16
257  store i16 %v, ptr %p, align 1
258  ret void
259}
260
261; CHECK-LABEL: sti16_a2:
262; CHECK-NEXT: .functype sti16_a2 (i32, i64) -> (){{$}}
263; CHECK-NEXT: i64.store16 0($0), $1{{$}}
264; CHECK-NEXT: return{{$}}
265define void @sti16_a2(ptr %p, i64 %w) {
266  %v = trunc i64 %w to i16
267  store i16 %v, ptr %p, align 2
268  ret void
269}
270
271; CHECK-LABEL: sti16_a4:
272; CHECK-NEXT: .functype sti16_a4 (i32, i64) -> (){{$}}
273; CHECK-NEXT: i64.store16 0($0), $1{{$}}
274; CHECK-NEXT: return{{$}}
275define void @sti16_a4(ptr %p, i64 %w) {
276  %v = trunc i64 %w to i16
277  store i16 %v, ptr %p, align 4
278  ret void
279}
280
281; CHECK-LABEL: sti32_a1:
282; CHECK-NEXT: .functype sti32_a1 (i32, i64) -> (){{$}}
283; CHECK-NEXT: i64.store32 0($0):p2align=0, $1{{$}}
284; CHECK-NEXT: return{{$}}
285define void @sti32_a1(ptr %p, i64 %w) {
286  %v = trunc i64 %w to i32
287  store i32 %v, ptr %p, align 1
288  ret void
289}
290
291; CHECK-LABEL: sti32_a2:
292; CHECK-NEXT: .functype sti32_a2 (i32, i64) -> (){{$}}
293; CHECK-NEXT: i64.store32 0($0):p2align=1, $1{{$}}
294; CHECK-NEXT: return{{$}}
295define void @sti32_a2(ptr %p, i64 %w) {
296  %v = trunc i64 %w to i32
297  store i32 %v, ptr %p, align 2
298  ret void
299}
300
301; CHECK-LABEL: sti32_a4:
302; CHECK-NEXT: .functype sti32_a4 (i32, i64) -> (){{$}}
303; CHECK-NEXT: i64.store32 0($0), $1{{$}}
304; CHECK-NEXT: return{{$}}
305define void @sti32_a4(ptr %p, i64 %w) {
306  %v = trunc i64 %w to i32
307  store i32 %v, ptr %p, align 4
308  ret void
309}
310
311; CHECK-LABEL: sti32_a8:
312; CHECK-NEXT: .functype sti32_a8 (i32, i64) -> (){{$}}
313; CHECK-NEXT: i64.store32 0($0), $1{{$}}
314; CHECK-NEXT: return{{$}}
315define void @sti32_a8(ptr %p, i64 %w) {
316  %v = trunc i64 %w to i32
317  store i32 %v, ptr %p, align 8
318  ret void
319}
320
321;===----------------------------------------------------------------------------
322; Atomic loads
323;===----------------------------------------------------------------------------
324
325; Wasm atomics have the alignment field, but it must always have the type's
326; natural alignment.
327
328; CHECK-LABEL: ldi64_atomic_a8:
329; CHECK-NEXT: .functype ldi64_atomic_a8 (i32) -> (i64){{$}}
330; CHECK-NEXT: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
331; CHECK-NEXT: return $pop[[NUM]]{{$}}
332define i64 @ldi64_atomic_a8(ptr %p) {
333  %v = load atomic i64, ptr %p seq_cst, align 8
334  ret i64 %v
335}
336
337; 16 is greater than the default alignment so it is ignored.
338
339; CHECK-LABEL: ldi64_atomic_a16:
340; CHECK-NEXT: .functype ldi64_atomic_a16 (i32) -> (i64){{$}}
341; CHECK-NEXT: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
342; CHECK-NEXT: return $pop[[NUM]]{{$}}
343define i64 @ldi64_atomic_a16(ptr %p) {
344  %v = load atomic i64, ptr %p seq_cst, align 16
345  ret i64 %v
346}
347
348;===----------------------------------------------------------------------------
349; Atomic stores
350;===----------------------------------------------------------------------------
351
352; CHECK-LABEL: sti64_atomic_a4:
353; CHECK-NEXT: .functype sti64_atomic_a4 (i32, i64) -> (){{$}}
354; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
355; CHECK-NEXT: return{{$}}
356define void @sti64_atomic_a4(ptr %p, i64 %v) {
357 store atomic i64 %v, ptr %p seq_cst, align 8
358 ret void
359}
360
361; 16 is greater than the default alignment so it is ignored.
362
363; CHECK-LABEL: sti64_atomic_a8:
364; CHECK-NEXT: .functype sti64_atomic_a8 (i32, i64) -> (){{$}}
365; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
366; CHECK-NEXT: return{{$}}
367define void @sti64_atomic_a8(ptr %p, i64 %v) {
368 store atomic i64 %v, ptr %p seq_cst, align 16
369 ret void
370}
371