1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s 3 4declare <256 x i32> @llvm.vp.shl.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) 5 6define fastcc <256 x i32> @test_vp_v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { 7; CHECK-LABEL: test_vp_v256i32: 8; CHECK: # %bb.0: 9; CHECK-NEXT: and %s0, %s0, (32)0 10; CHECK-NEXT: lvl %s0 11; CHECK-NEXT: pvsll.lo %v0, %v0, %v1, %vm1 12; CHECK-NEXT: b.l.t (, %s10) 13 %r0 = call <256 x i32> @llvm.vp.shl.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) 14 ret <256 x i32> %r0 15} 16 17 18declare <256 x i64> @llvm.vp.shl.v256i64(<256 x i64>, <256 x i64>, <256 x i1>, i32) 19 20define fastcc <256 x i64> @test_vp_v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 %n) { 21; CHECK-LABEL: test_vp_v256i64: 22; CHECK: # %bb.0: 23; CHECK-NEXT: and %s0, %s0, (32)0 24; CHECK-NEXT: lvl %s0 25; CHECK-NEXT: vsll %v0, %v0, %v1, %vm1 26; CHECK-NEXT: b.l.t (, %s10) 27 %r0 = call <256 x i64> @llvm.vp.shl.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 %n) 28 ret <256 x i64> %r0 29} 30