1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -O0 --mtriple=ve -mattr=+vpu | FileCheck %s 3 4declare i64 @llvm.vector.reduce.or.v256i64(<256 x i64>) 5 6define fastcc i64 @vec_reduce_or_v256i64(<256 x i64> %v) { 7; CHECK-LABEL: vec_reduce_or_v256i64: 8; CHECK: # %bb.0: 9; CHECK-NEXT: lea %s0, 256 10; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0 11; CHECK-NEXT: lvl %s0 12; CHECK-NEXT: vror %v0, %v0 13; CHECK-NEXT: lvs %s0, %v0(0) 14; CHECK-NEXT: b.l.t (, %s10) 15 %r = call i64 @llvm.vector.reduce.or.v256i64( <256 x i64> %v) 16 ret i64 %r 17} 18 19declare i32 @llvm.vector.reduce.or.v256i32(<256 x i32>) 20 21define fastcc i32 @vec_reduce_or_v256i32(<256 x i32> %v) { 22; CHECK-LABEL: vec_reduce_or_v256i32: 23; CHECK: # %bb.0: 24; CHECK-NEXT: lea %s0, 256 25; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0 26; CHECK-NEXT: lvl %s0 27; CHECK-NEXT: vror %v0, %v0 28; CHECK-NEXT: lvs %s0, %v0(0) 29; CHECK-NEXT: or %s1, 0, %s0 30; CHECK-NEXT: # implicit-def: $sx0 31; CHECK-NEXT: or %s0, 0, %s1 32; CHECK-NEXT: b.l.t (, %s10) 33 %r = call i32 @llvm.vector.reduce.or.v256i32( <256 x i32> %v) 34 ret i32 %r 35} 36