1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s 3 4; This would assert because VE specified that all setcc 5; nodes (even with vector operands) return a scalar value. 6 7define <4 x i8> @udiv_by_minus_one(<4 x i8> %x) { 8; CHECK-LABEL: udiv_by_minus_one: 9; CHECK: # %bb.0: 10; CHECK-NEXT: and %s0, %s0, (56)0 11; CHECK-NEXT: lea %s4, 16843010 12; CHECK-NEXT: muls.l %s0, %s0, %s4 13; CHECK-NEXT: srl %s0, %s0, 32 14; CHECK-NEXT: and %s1, %s1, (56)0 15; CHECK-NEXT: muls.l %s1, %s1, %s4 16; CHECK-NEXT: srl %s1, %s1, 32 17; CHECK-NEXT: and %s2, %s2, (56)0 18; CHECK-NEXT: muls.l %s2, %s2, %s4 19; CHECK-NEXT: srl %s2, %s2, 32 20; CHECK-NEXT: and %s3, %s3, (56)0 21; CHECK-NEXT: muls.l %s3, %s3, %s4 22; CHECK-NEXT: srl %s3, %s3, 32 23; CHECK-NEXT: b.l.t (, %s10) 24 %r = udiv <4 x i8> %x, <i8 255, i8 255, i8 255, i8 255> 25 ret <4 x i8> %r 26} 27 28define <4 x i8> @urem_by_minus_one(<4 x i8> %x) { 29; CHECK-LABEL: urem_by_minus_one: 30; CHECK: # %bb.0: 31; CHECK-NEXT: and %s0, %s0, (56)0 32; CHECK-NEXT: and %s1, %s1, (56)0 33; CHECK-NEXT: and %s2, %s2, (56)0 34; CHECK-NEXT: and %s3, %s3, (56)0 35; CHECK-NEXT: lea %s4, 16843010 36; CHECK-NEXT: muls.l %s5, %s3, %s4 37; CHECK-NEXT: srl %s5, %s5, 32 38; CHECK-NEXT: muls.w.sx %s5, %s5, (56)0 39; CHECK-NEXT: subs.w.sx %s3, %s3, %s5 40; CHECK-NEXT: muls.l %s5, %s2, %s4 41; CHECK-NEXT: srl %s5, %s5, 32 42; CHECK-NEXT: muls.w.sx %s5, %s5, (56)0 43; CHECK-NEXT: subs.w.sx %s2, %s2, %s5 44; CHECK-NEXT: muls.l %s5, %s1, %s4 45; CHECK-NEXT: srl %s5, %s5, 32 46; CHECK-NEXT: muls.w.sx %s5, %s5, (56)0 47; CHECK-NEXT: subs.w.sx %s1, %s1, %s5 48; CHECK-NEXT: muls.l %s4, %s0, %s4 49; CHECK-NEXT: srl %s4, %s4, 32 50; CHECK-NEXT: muls.w.sx %s4, %s4, (56)0 51; CHECK-NEXT: subs.w.sx %s0, %s0, %s4 52; CHECK-NEXT: b.l.t (, %s10) 53 %r = urem <4 x i8> %x, <i8 255, i8 255, i8 255, i8 255> 54 ret <4 x i8> %r 55} 56