1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s 3 4@v256i64 = common dso_local local_unnamed_addr global <256 x i64> zeroinitializer, align 16 5 6; Function Attrs: norecurse nounwind readonly 7define fastcc <256 x i64> @loadv256i64(ptr nocapture readonly) { 8; CHECK-LABEL: loadv256i64: 9; CHECK: # %bb.0: 10; CHECK-NEXT: lea %s1, 256 11; CHECK-NEXT: lvl %s1 12; CHECK-NEXT: vld %v0, 8, %s0 13; CHECK-NEXT: b.l.t (, %s10) 14 %2 = load <256 x i64>, ptr %0, align 16 15 ret <256 x i64> %2 16} 17 18; Function Attrs: norecurse nounwind readonly 19define fastcc <256 x double> @loadv256f64(ptr nocapture readonly) { 20; CHECK-LABEL: loadv256f64: 21; CHECK: # %bb.0: 22; CHECK-NEXT: lea %s1, 256 23; CHECK-NEXT: lvl %s1 24; CHECK-NEXT: vld %v0, 8, %s0 25; CHECK-NEXT: b.l.t (, %s10) 26 %2 = load <256 x double>, ptr %0, align 16 27 ret <256 x double> %2 28} 29 30; Function Attrs: norecurse nounwind readonly 31define fastcc <256 x i32> @loadv256i32(ptr nocapture readonly) { 32; CHECK-LABEL: loadv256i32: 33; CHECK: # %bb.0: 34; CHECK-NEXT: lea %s1, 256 35; CHECK-NEXT: lvl %s1 36; CHECK-NEXT: vldl.zx %v0, 4, %s0 37; CHECK-NEXT: b.l.t (, %s10) 38 %2 = load <256 x i32>, ptr %0, align 16 39 ret <256 x i32> %2 40} 41 42; Function Attrs: norecurse nounwind readonly 43define fastcc <256 x float> @loadv256f32(ptr nocapture readonly) { 44; CHECK-LABEL: loadv256f32: 45; CHECK: # %bb.0: 46; CHECK-NEXT: lea %s1, 256 47; CHECK-NEXT: lvl %s1 48; CHECK-NEXT: vldu %v0, 4, %s0 49; CHECK-NEXT: b.l.t (, %s10) 50 %2 = load <256 x float>, ptr %0, align 16 51 ret <256 x float> %2 52} 53 54; Function Attrs: norecurse nounwind readonly 55define fastcc <256 x i64> @loadv256i64stk() { 56; CHECK-LABEL: loadv256i64stk: 57; CHECK: # %bb.0: 58; CHECK-NEXT: lea %s11, -2048(, %s11) 59; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2 60; CHECK-NEXT: # %bb.1: 61; CHECK-NEXT: ld %s61, 24(, %s14) 62; CHECK-NEXT: or %s62, 0, %s0 63; CHECK-NEXT: lea %s63, 315 64; CHECK-NEXT: shm.l %s63, (%s61) 65; CHECK-NEXT: shm.l %s8, 8(%s61) 66; CHECK-NEXT: shm.l %s11, 16(%s61) 67; CHECK-NEXT: monc 68; CHECK-NEXT: or %s0, 0, %s62 69; CHECK-NEXT: .LBB4_2: 70; CHECK-NEXT: lea %s0, 256 71; CHECK-NEXT: lea %s1, (, %s11) 72; CHECK-NEXT: lvl %s0 73; CHECK-NEXT: vld %v0, 8, %s1 74; CHECK-NEXT: lea %s11, 2048(, %s11) 75; CHECK-NEXT: b.l.t (, %s10) 76 %addr = alloca <256 x i64>, align 16 77 %1 = load <256 x i64>, ptr %addr, align 16 78 ret <256 x i64> %1 79} 80 81; Function Attrs: norecurse nounwind readonly 82define fastcc <256 x i64> @loadv256i64com() { 83; CHECK-LABEL: loadv256i64com: 84; CHECK: # %bb.0: 85; CHECK-NEXT: lea %s0, v256i64@lo 86; CHECK-NEXT: and %s0, %s0, (32)0 87; CHECK-NEXT: lea.sl %s0, v256i64@hi(, %s0) 88; CHECK-NEXT: lea %s1, 256 89; CHECK-NEXT: lvl %s1 90; CHECK-NEXT: vld %v0, 8, %s0 91; CHECK-NEXT: b.l.t (, %s10) 92 %1 = load <256 x i64>, ptr @v256i64, align 16 93 ret <256 x i64> %1 94} 95