xref: /llvm-project/llvm/test/CodeGen/VE/Vector/loadvm.ll (revision b006b60dc993b2e0ba3e412c80709477241b6be6)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s
3
4@v256i1 = common dso_local local_unnamed_addr global <256 x i1> zeroinitializer, align 4
5@v512i1 = common dso_local local_unnamed_addr global <512 x i1> zeroinitializer, align 4
6
7; Function Attrs: norecurse nounwind readonly
8define fastcc <256 x i1> @loadv256i1(ptr nocapture readonly %mp) {
9; CHECK-LABEL: loadv256i1:
10; CHECK:       # %bb.0:
11; CHECK-NEXT:    ld %s1, (, %s0)
12; CHECK-NEXT:    ld %s2, 8(, %s0)
13; CHECK-NEXT:    ld %s3, 16(, %s0)
14; CHECK-NEXT:    ld %s0, 24(, %s0)
15; CHECK-NEXT:    lvm %vm1, 0, %s1
16; CHECK-NEXT:    lvm %vm1, 1, %s2
17; CHECK-NEXT:    lvm %vm1, 2, %s3
18; CHECK-NEXT:    lvm %vm1, 3, %s0
19; CHECK-NEXT:    b.l.t (, %s10)
20  %m = load <256 x i1>, ptr %mp, align 16
21  ret <256 x i1> %m
22}
23
24; Function Attrs: norecurse nounwind readonly
25define fastcc <256 x i1> @loadv256i1com() {
26; CHECK-LABEL: loadv256i1com:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    lea %s0, v256i1@lo
29; CHECK-NEXT:    and %s0, %s0, (32)0
30; CHECK-NEXT:    lea.sl %s0, v256i1@hi(, %s0)
31; CHECK-NEXT:    ld %s1, (, %s0)
32; CHECK-NEXT:    ld %s2, 8(, %s0)
33; CHECK-NEXT:    ld %s3, 16(, %s0)
34; CHECK-NEXT:    ld %s0, 24(, %s0)
35; CHECK-NEXT:    lvm %vm1, 0, %s1
36; CHECK-NEXT:    lvm %vm1, 1, %s2
37; CHECK-NEXT:    lvm %vm1, 2, %s3
38; CHECK-NEXT:    lvm %vm1, 3, %s0
39; CHECK-NEXT:    b.l.t (, %s10)
40  %m = load <256 x i1>, ptr @v256i1, align 16
41  ret <256 x i1> %m
42}
43
44; Function Attrs: norecurse nounwind readonly
45define fastcc <512 x i1> @loadv512i1(ptr nocapture readonly %mp) {
46; CHECK-LABEL: loadv512i1:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    ld %s1, (, %s0)
49; CHECK-NEXT:    ld %s2, 8(, %s0)
50; CHECK-NEXT:    ld %s3, 16(, %s0)
51; CHECK-NEXT:    ld %s4, 24(, %s0)
52; CHECK-NEXT:    lvm %vm3, 0, %s1
53; CHECK-NEXT:    lvm %vm3, 1, %s2
54; CHECK-NEXT:    lvm %vm3, 2, %s3
55; CHECK-NEXT:    lvm %vm3, 3, %s4
56; CHECK-NEXT:    ld %s1, 32(, %s0)
57; CHECK-NEXT:    ld %s2, 40(, %s0)
58; CHECK-NEXT:    ld %s3, 48(, %s0)
59; CHECK-NEXT:    ld %s0, 56(, %s0)
60; CHECK-NEXT:    lvm %vm2, 0, %s1
61; CHECK-NEXT:    lvm %vm2, 1, %s2
62; CHECK-NEXT:    lvm %vm2, 2, %s3
63; CHECK-NEXT:    lvm %vm2, 3, %s0
64; CHECK-NEXT:    b.l.t (, %s10)
65  %m = load <512 x i1>, ptr %mp, align 16
66  ret <512 x i1> %m
67}
68
69; Function Attrs: norecurse nounwind readonly
70define fastcc <512 x i1> @loadv512i1com() {
71; CHECK-LABEL: loadv512i1com:
72; CHECK:       # %bb.0:
73; CHECK-NEXT:    lea %s0, v512i1@lo
74; CHECK-NEXT:    and %s0, %s0, (32)0
75; CHECK-NEXT:    lea.sl %s0, v512i1@hi(, %s0)
76; CHECK-NEXT:    ld %s1, (, %s0)
77; CHECK-NEXT:    ld %s2, 8(, %s0)
78; CHECK-NEXT:    ld %s3, 16(, %s0)
79; CHECK-NEXT:    ld %s4, 24(, %s0)
80; CHECK-NEXT:    lvm %vm3, 0, %s1
81; CHECK-NEXT:    lvm %vm3, 1, %s2
82; CHECK-NEXT:    lvm %vm3, 2, %s3
83; CHECK-NEXT:    lvm %vm3, 3, %s4
84; CHECK-NEXT:    ld %s1, 32(, %s0)
85; CHECK-NEXT:    ld %s2, 40(, %s0)
86; CHECK-NEXT:    ld %s3, 48(, %s0)
87; CHECK-NEXT:    ld %s0, 56(, %s0)
88; CHECK-NEXT:    lvm %vm2, 0, %s1
89; CHECK-NEXT:    lvm %vm2, 1, %s2
90; CHECK-NEXT:    lvm %vm2, 2, %s3
91; CHECK-NEXT:    lvm %vm2, 3, %s0
92; CHECK-NEXT:    b.l.t (, %s10)
93  %m = load <512 x i1>, ptr @v512i1, align 16
94  ret <512 x i1> %m
95}
96
97