1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s 2 3;;; Test leading zero of vm intrinsic instructions 4;;; 5;;; Note: 6;;; We test LZVM*ml instruction. 7 8; Function Attrs: nounwind readnone 9define fastcc i64 @lzvm_sml(<256 x i1> %0) { 10; CHECK-LABEL: lzvm_sml: 11; CHECK: # %bb.0: 12; CHECK-NEXT: lea %s0, 256 13; CHECK-NEXT: lvl %s0 14; CHECK-NEXT: lzvm %s0, %vm1 15; CHECK-NEXT: b.l.t (, %s10) 16 %2 = tail call i64 @llvm.ve.vl.lzvm.sml(<256 x i1> %0, i32 256) 17 ret i64 %2 18} 19 20; Function Attrs: nounwind readnone 21declare i64 @llvm.ve.vl.lzvm.sml(<256 x i1>, i32) 22